Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – Including additional component in same – non-isolated structure
Reexamination Certificate
2002-11-07
2004-12-21
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
Including additional component in same, non-isolated structure
19, 19, 19, C438S309000, C438S329000
Reexamination Certificate
active
06833606
ABSTRACT:
“This application is a U.S. National filing under 35 U.S.C. §119 hereby claiming priority to GB Application No. 0126895.2, filed Nov. 8, 2001, the contents of which are incorporated herein by reference for all purposes.”
1. Field of the Invention
The present invention relates to a process for fabricating a semiconductor device, and more particularly to the fabrication of a heterojunction bipolar transistor with integrated metal-insulator-metal (MIM) capacitor.
2. Background to the Invention
Transistors are commonly used to provide amplifying or switching functions in electronic circuits. The bipolar transistor comprises three regions: an emitter, a collector, and a base located between the emitter and collector. The interfaces, emitter-base and collector-base, between the three regions provide two p-n junctions in close proximity, which are utilized to achieve the bipolar transistor action. The transistor performance demanded by some applications has now reached the operational limit of many conventional designs. A popular approach to overcoming some of these limitations is to include heterojunctions in the heterostructure of the transistor. A heterojunction comprises a junction between two semiconducting materials with different band gaps. Typically, in a transistor comprising heterojunctions, the emitter material has a larger band gap than the base material. The resulting device is termed a heterojunction bipolar transistor (HBT) and has been fabricated using a range of material systems, including silicon-germanium (SiGe), gallium arsenide (GaAs) and indium phosphide (InP).
A typical HBT is a vertically constructed device which consists of a base layer sandwiched between an emitter layer and a collector layer as shown in FIG.
1
. Here the heterostructure comprises doped layers of InP and indium gallium arsenide (InGaAs) on an InP semi-insulating substrate. In order to improve the long term reliability of the transistor, a layer of silicon nitride (SiN), silicon dioxide (SiO
2
), polyimide or benzocyclobutene (BCB) is usually applied to passivate the entire structure, thus protecting the semiconductor layers from direct exposure to environmental elements, such as air or moisture, which could degrade the device performance over time.
The HBT is of particular use in the high frequency (such as multi-GHz) regime, including microwave and millimetre-wave applications. Microwave signals are widely used for high speed communications, including the provision of driving signals for optoelectronic devices. An important building block is the monolithic microwave integrated circuit (MMIC) fabricated on a single chip and commonly comprising active components such as transistors, including the HBT, and passive components such as the metal-insulator-metal (MIM) capacitor and thin film resistor, also fabricated on the same wafer. Indeed, such passive components are often located on the semi-insulating substrate (e.g. GaAs or InP) of the wafer as shown in
FIGS. 2 and 3
, to avoid current leakage problems. However, the production methods typically used means that the passive components are fabricated subsequently to the HBT, and by a different process. This leads to a more complex production procedure, with many more steps.
The insulator layer used in the fabrication of such MIM capacitors typically comprises a film of a dielectric material with high dielectric constant. Examples include SiN and SiO
2
, materials that can also be used for HBT surface passivation. The deposition of SiN and SiO
2
dielectric films frequently employs plasma-assisted techniques such as plasma enhanced chemical vapour deposition (PECVD). However, the use of a plasma deposition technique is reported to have caused surface damage to an HBT device structure, especially the emitter and base junction area, resulting in degradation of the HBT performance and a potential lack of long-term device reliability. Thus, materials such as polyimide and BCB, which do not use plasma deposition techniques, are preferable for the passivation layer. Unfortunately, these materials are not suitable to be employed as the insulator layer for MIM capacitors, due to their low dielectric constant.
Despite the aforementioned problems, the most common approach used in the production of a complete MMIC is to fabricate first any active devices, such as an HBT, and then subsequently to fabricate the passive components. Using such conventional techniques, the HBT device will unavoidably be exposed to the plasma during the deposition of a dielectric film for the insulator layer of the MIM capacitor, and possibly for the passivation layer of the HBT itself.
A fabrication process has been disclosed in U.S. Pat. No. 5,858,850 for the near simultaneous fabrication of an HBT with integrated capacitor. In this case the HBT is based on a SiGe heterostructure and the capacitor is of the metal-insulator-metal (MIS) type. In the resulting device, either a diffusion layer or the base electrode of the HBT are fabricated from the same material layer as the lower electrode of the MIS capacitor. Similarly, the emitter electrode and upper capacitor electrode are fabricated from common polycrystalline silicon film. Furthermore, to reduce the number of process steps, a layer of SiN is deposited to serve both as the insulator layer for the MIS capacitor, but also as a necessary insulating sidewall for part of the HBT. However, the formation of such a layer by plasma deposition techniques could still lead to degradation of the HBT structure.
SUMMARY OF THE INVENTION
According to the present invention, there is provided a process of fabricating a semiconductor device, including the steps of:
forming a lower plate and an insulator section of a metal-insulator-metal (MIM) capacitor on an upper surface of a heterostructure, the material of the lower plate and underlying heterostructure being common to an electrode and substructure of an emitter section of a heterojunction bipolar transistor (HBT) subsequently defined in the process on another section of the device;
forming a base electrode of the HBT and an upper plate of the MIM capacitor from a commonly deposited metal layer; and,
defining base and collector sections of the HBT in layers of the heterostructure located beneath the emitter section.
In the present invention a semiconductor device is formed which includes an MIM capacitor located on the upper surface of a heterostructure from which the emitter, base and collector sections of a nearby HBT are defined. In this way the capacitor and HBT share a substantially common structure, with the base and emitter electrodes of the HBT fashioned from the same metal layers as the upper and lower capacitor plates, respectively. Furthermore, as the insulator region of the capacitor is formed prior to definition of the HBT structure, the dielectric material used can be deposited by means of a plasma enhanced process, without damaging the HBT structure.
Although the HBT-like heterostructure beneath the MIM capacitor is redundant, it is important to isolate it from the HBT itself. Therefore, it is preferred that a section of heterostructure between the location of the HBT and capacitor is etched down to the semi-insulating substrate, so as to provide isolation.
Preferably, the device heterostructure comprises doped layers of epitaxially grown InP/InGaAs materials on a semi-insulating layer of InP.
Preferably, the insulator for the MIM capacitor comprises a dielectric material with a high dielectric constant. More preferably, the insulator for the MIM capacitor comprises a layer of SiN material.
Preferably, any plasma deposition procedures are performed prior to the definition of features in the heterostructure, which may be damaged by exposure to plasma.
Other passive devices, including a thin film resistor, may be defined during the fabrication process. Preferably, metal contacts or electrodes for such devices will be defined from metal layers deposited for the formation of similar structures for the HBT and MIM capacitor. In this way, the number of metal deposition steps d
Ang Kian Siong
Ang Ting Cheong
Halder Subrata
Nakamura Hiroshi
Ng Geok Ing
Buckley Maschoff & Talwalkar LLC
Denselight Semiconductor PTE LTD
Flynn Nathan J.
Mondt Johannes
LandOfFree
Fabrication of a heterojunction bipolar transistor with... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fabrication of a heterojunction bipolar transistor with..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabrication of a heterojunction bipolar transistor with... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3280578