Fabrication methods for the high capacity ram cell

Metal working – Method of mechanical manufacture – Assembling or joining

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357 24, 357 45, 365178, 365182, H01L 2170

Patent

active

041125754

ABSTRACT:
Disclosed is a process for constructing an array of memory cells. Each cell is constructed to have a high storage capacity and low leakage current. The cells are formed on a surface of a semiconductor substrate. Each cell has a storage region and an adjacent transfer region. The process forms a deep ion layer and a shallow ion layer in the storage region of each cell. At the storage region-transfer region interface, the deep ion layer lies laterally within the shallow ion layer. In the other portions of the storage region, the deep ion layer extends laterally into adjoining channel stops.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 3720922 (1973-03-01), Kosonocky
patent: 3740732 (1973-06-01), Frandon

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