Semiconductor device manufacturing: process – With measuring or testing – Optical characteristic sensed
Patent
1996-10-10
1998-09-29
Breneman, R. Bruce
Semiconductor device manufacturing: process
With measuring or testing
Optical characteristic sensed
438692, 216 60, H01L 2102, H01L 21304
Patent
active
058145281
ABSTRACT:
A fabrication method for a test piece for observing non-contact regions in a pair of bonded semiconductor substrates includes thinning one substrate of a pair of bonded semiconductor substrates, grade-polishing the thinned semiconductor substrate and the bonded semiconductor substrates to have a predetermined graded angle relative their bonded surfaces, and dry-etching an area around the bonded surfaces of the grade-polished semiconductor substrates to reveal faults. With the thusly fabricated test piece, micro non-contact regions can be simply observed and crystal faults existing on the bonded surfaces as well as in the micro non-contact regions can be easily detected.
REFERENCES:
"Structural Evaluation of Silicon-On-Insulation Fabricated By A Direct Wafer Bonding And Numerically Controlled Polishing Technique"; J. Elect. Soc., vol. 138, No. 8, pp. 2468-2474; Yamada et. al.; Aug. 1991.
"Recent Advances In Thinning of Bonded So I Wafers by Plasma Assited Chemical Etching"; Mumola et al.; Proceedings of The Third Internation Symposium on Semiconductor Wafer Bonding: Physics and Applications, Abstract Only (p. 28).
Yun, et al., "Studies on Microvoids at the Interface of Direct Bonded Silicon Wafers," J. Electrochem. Soc., 139:2326-2330 (Aug., 1992).
Ju Byeong Kwon
Koh Keun Ha
Lee Nam Yang
Lee Yun Hi
Oh Myung Hwan
Breneman R. Bruce
Goudreau George
Korea Intstitute of Science and Technology
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