Fabrication method of semiconductor integrated circuit device

Details Fabrication method of semiconductor integrated circuit device Fabrication method of semiconductor integrated circuit device

2006-08-01

2006-08-01

Vinh, Lan (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C438S710000, C438S715000, C134S001200

Reexamination Certificate

active

07084063

ABSTRACT:
The copper interconnect formed by the use of a damascene technique is improved in dielectric breakdown strength (reliability). During post-CMP cleaning, alkali cleaning, a deoxidizing process due to hydrogen annealing or the like, and acid cleaning are carried out in this order. After the post-CMP cleaning and before forming an insulation film for a cap film, hydrogen plasma and ammonia plasma processes are carried out on the semiconductor substrate. In this way, a copper-based buried interconnect is formed in an interlayer insulation film structured of an insulation material having a low dielectric constant.

REFERENCES:
patent: 5989353 (1999-11-01), Skee et al.
patent: 6048789 (2000-04-01), Vines et al.
patent: 6136680 (2000-10-01), Lai et al.
patent: 6143658 (2000-11-01), Donnelly, Jr. et al.
patent: 6159857 (2000-12-01), Liu et al.
patent: 6165894 (2000-12-01), Pramanick et al.
patent: 6171957 (2001-01-01), Maekawa
patent: 6174810 (2001-01-01), Islam et al.
patent: 6181012 (2001-01-01), Edelstein et al.
patent: 6191007 (2001-02-01), Matsui et al.
patent: 6242349 (2001-06-01), Nogami et al.
patent: 6274923 (2001-08-01), Mikagi
patent: 6291007 (2001-09-01), White et al.
patent: 6303505 (2001-10-01), Ngo et al.
patent: 6348402 (2002-02-01), Kawanoue et al.
patent: 6355571 (2002-03-01), Huang et al.
patent: 6482755 (2002-11-01), Ngo et al.
patent: 6521532 (2003-02-01), Cunningham
patent: 6534397 (2003-03-01), Okada et al.
patent: 2001/0052351 (2001-12-01), Brown et al.
patent: 2002/0102834 (2002-08-01), Yang
patent: 2002/0119651 (2002-08-01), Noguchi et al.
patent: 06-037038 (1994-02-01), None
patent: 06-224194 (1994-08-01), None
patent: 09-082798 (1997-03-01), None
patent: 10-261715 (1998-09-01), None
patent: 11-016912 (1999-01-01), None
patent: 11-330246 (1999-11-01), None
Process Focus; Semiconductor World 1998, 10; pp. 62-63 and 70-72.

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