Fabrication method of semiconductor integrated circuit device

Details Fabrication method of semiconductor integrated circuit device Fabrication method of semiconductor integrated circuit device

2001-09-28

2004-02-03

Young, Christopher G. (Department: 1756)

Radiation imagery chemistry: process, composition, or product th

Including control feature responsive to a test or measurement

C430S022000, C430S311000

Reexamination Certificate

active

06686108

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a method of fabricating a semiconductor integrated circuit device (hereinafter called a semiconductor IC device); and, more particularly, the invention relates to a technique that can be effectively applied to a photolithography process (hereinafter, simply referred to as lithography) for the transfer of a predetermined pattern to a semiconductor wafer (hereinafter, simply referred to as wafer) using a photomask (hereinafter, simply referred to as mask) in the manufacture of a semiconductor IC device.
In the manufacture of a semiconductor IC device, a lithography technique is used as a method of transferring a fine pattern to a wafer. In the lithography technique, a projection aligner is mainly used to form a device pattern by transferring the pattern of a mask mounted on the projection aligner onto a wafer. This lithography technique is described, for example, in Japanese Unexamined Patent Publication No. 135402/1999. Namely, this reference discloses a technique for allocating an auxiliary aperture to such a degree as to not be resolved in the periphery of a main aperture provided to form a contact hole of a memory device in the mask and for utilizing a modified lighting or the like for the exposing process.
However, the inventors of the present invention have found that the above-referenced lithography technique has the following inherent problems. Namely, with improvement in the scale-down, the margin for depth of focus decreases, and, thereby, the resolution of the patterns is lowered. Moreover, when a coarse region wherein patterns are discretely allocated on the same layer and a fine region wherein patterns are closely allocated coexist, a difference is generated in the pattern sizes of such coarse region and fine region. Moreover, the size accuracy of patterns existing at the boundary between the coarse region and fine region is deteriorated.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a technique to improve the resolution of patterns.
Moreover, another object of the present invention is to provide a technique to reduce the size difference between patterns in the coarse region and those in the fine region.
Still another object of the present invention is to provide a technique to improve the size accuracy of patterns existing at the boundary of the coarse region and fine region.
The abovementioned objects and other objects and novel characteristics of the present invention will become more apparent from the following more detailed description of the present invention and the accompanying drawings.
The summary of the representative aspects and features of the invention disclosed in the present specification will be briefly explained as follows.
Namely, the present invention utilizes, on the occasion of the aligning process, to transfer a predetermined pattern to a semiconductor wafer by irradiating a photoresist film on the semiconductor wafer with an aligning light beam of a modified lighting (that is, off-axis illumination; hereinafter referred to as modified lighting) via a photomask, a photomask allocating, to provide periodicity, main apertures to transfer the predetermined pattern, which are apertures formed by removing a part of a half-tone film on a mask substrate, and auxiliary apertures not resolved on a semiconductor wafer, which are apertures formed by removing a part of the half-tone film.
Moreover, the present invention utilizes a photomask in which main apertures, that are used to transfer the predetermined pattern and that are formed as apertures by removing a part of a light shielding film on the mask substrate, and auxiliary apertures, that are not resolved on the semiconductor wafer and that are the apertures formed by removing a part of the light shielding film, are allocated to provide periodicity on the occasion of the aligning process to transfer the predetermined pattern to the semiconductor wafer by irradiating the photoresist film on the semiconductor wafer with an aligning laser beam of the modified lighting via the photomask, with a view toward realizing a proximity correction of the predetermined main apertures among the main apertures, predetermined auxiliary apertures among the auxiliary apertures or to both apertures.
Moreover, the present invention utilizes, on the occasion of aligning process, to transfer a predetermined pattern to a semiconductor wafer by irradiating a photoresist film on the semiconductor wafer with an aligning laser beam of a modified lighting via a photomask, the photomask thereof allocating, to provide periodicity, main apertures to transfer the predetermined pattern, which are apertures formed by removing a part of the light shielding film on the mask substrate, and auxiliary apertures not resolved on the semiconductor wafer, which are apertures formed by removing a part of the light shielding film, and also forming the auxiliary aperture allocation region as a region broadened an integer number of times the pitch of the predetermined pattern with reference to the main apertures.
Moreover, the present invention discloses a structure in which the coarse region, where the predetermined relatively coarse pattern is allocated, and the fine region, where the predetermined relatively fine pattern is allocated, coexist in the same layer in the predetermined region of the semiconductor wafer.


REFERENCES:
patent: 6335130 (2002-01-01), Chen et al.
patent: 6482555 (2002-11-01), Chen et al.
patent: 5630129 (1981-03-01), None
patent: 5922050 (1984-02-01), None

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