Fabrication method of semiconductor integrated circuit device

Details Fabrication method of semiconductor integrated circuit device Fabrication method of semiconductor integrated circuit device

2003-07-09

2004-09-28

Nelms, David (Department: 2818)

Radiation imagery chemistry: process, composition, or product th

Radiation modifying product or process of making

Radiation mask

C430S492000

Reexamination Certificate

active

06797442

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a technology for fabricating a semiconductor device, and particularly to a technology effective for application to a technology for manufacturing a semiconductor device, using a photolithography method.
A process for manufacturing a semiconductor device includes a number of photolithography process steps for patterning a material film formed on a semiconductor wafer into desired shapes. In the photolithography process step, a resist (photoresist) film is applied or formed onto the material film lying on the semiconductor wafer and exposed by an exposure system (stepper). The stepper applies light from above a glass surface on which circuit patterns called reticles are drawn, and thereby form exposed and non-exposed portions on the resist film according to the applied light energy (exposure energy). Thereafter, the development thereof is done by a coating developing apparatus so that each resist pattern (photoresist pattern) having a predetermined shape is formed on the semiconductor wafer. Using the formed resist pattern as an etching mask, the material film on the semiconductor wafer is etched so that the material film formed on the semiconductor wafer can be patterned into desired shapes.
SUMMARY OF THE INVENTION
The dimension (open dimension or line width) of the resist pattern formed in the corresponding photolithography process step can be controlled with satisfactory reproducibility by the exposure energy applied onto the resist film. However, variations in semiconductor manufacturing equipment with time, the state thereof, or factors resultant from a resist film material or the like conspire to cause the formed resist pattern to vary with given fluctuations even if the exposure energy supplied from the exposure system is constant. Since the formed resist pattern goes through an etching process step and is thereby brought into a semiconductor circuit pattern, a defective product or item is developed when the dimension of the formed resist pattern much drifts from a target (intended) dimension. When the dimension of the resist pattern varies widely even though the dimension thereof is not much shifted from the target dimension, such variations might exert an influence on the operating speed and refresh characteristics or the like of a semiconductor device because the semiconductor device is operated in a fine circuit pattern. This will degrade production yields of the semiconductor device and increase the manufacturing cost of the semiconductor device.
Therefore, when the dimension of the formed resist pattern is drifting from the target dimension, there is a need to correct exposure energy and modify the dimension of the resist pattern. Namely, a decision as to whether it is necessary to correct the exposure energy, is made after the completion of exposure processing on a semiconductor wafer of a certain lot. If need be, then the exposure energy is corrected and exposure processing of a semiconductor wafer of the next lot is performed with the corrected exposure energy.
As a method of automatically correcting and controlling exposure energy of the exposure system such that the dimension of each resist pattern reaches a target dimension, the following two are considered.
As the first method, it is considered that a ratio a
1
(a
1
=&Dgr;W/&Dgr;E) of the amount of change in dimension of each resist pattern (&Dgr;W) to the amount of change in exposure energy (&Dgr;E) is quantified and set in advance, and the amount of correction of the exposure energy (&Dgr;E
d
) is determined from the difference (W
d
) between the dimension of the resist pattern and the target dimension (&Dgr;E
d
=W
d
/a
1
), thereby correcting the exposure energy.
According to the present method, exposure processing is effected on a resist film formed on a semiconductor wafer of a given lot. If the dimension of each formed resist pattern is drifting from the target dimension, then the exposure energy is corrected by the amount of exposure energy (calculated by &Dgr;E
d
=W
d
/a
1
) corresponding to the drift (W
d
) of the dimension of the resist pattern from the target dimension, and exposure processing is effected on a resist film on a semiconductor wafer of the next lot with the corrected exposure energy. Therefore, when the accuracy of a set value of above ratio a
1
is high, the dimension of the formed resist pattern quickly converges on the target dimension and hence its followability is satisfactory. However, there is the fear that when the accuracy of the set value of above ratio a
1
is low, the dimension of the formed resist pattern does not converge on the target dimension, and the dimension of each resist pattern formed with the corrected exposure energy overshoots the target dimension, for example, so the dimension of the resist pattern does not approach the target dimension in spite of any correction. Thus, there is a need to improve the accuracy of the set value of the ratio a
1
of the amount of change in dimension of the resist pattern to the amount of change in exposure energy. To this end, however, it is necessary to set parameters such as the type of resist, a process type (state of the surface of a semiconductor wafer), a target dimension, the amount of exposure based on lens aberration, a dimension linearity region, etc. Therefore, the present method is not suitable for production lines on which a small volume and wide variety of semiconductor devices are mass-produced. The manufacturing cost of the semiconductor device also increases. Since these parameters vary widely according to resist sensitivity, there is no guarantee that even if a strict experiment is done once to set parameters, the parameters remain unchanged on a permanent basis. Therefore, it is not easy to stably form resist patterns having dimensions which fall within a predetermined standard.
As the second method, it is considered that the amount of exposure energy (&Dgr;E
1
) to be changed once is set to a relatively small value so as not to diverge, and the exposure energy is adjusted &Dgr;E
1
by &Dgr;E
1
at a time until the dimension of each resist pattern falls within a predetermined standard range.
According to the present method, exposure processing is effected on a resist film formed on a semiconductor wafer of a given lot. If the dimension of each formed resist pattern falls beyond the predetermined standard range, then the exposure energy is corrected by the relatively small amount (&Dgr;E
1
) determined in advance, and exposure processing is effected on a resist film on a semiconductor wafer of the next lot with the corrected exposure energy. Since the amount of exposure energy to be changed at a time is small, the dimension of each formed resist pattern can be fine-adjusted. Therefore, the dimensions of the resist patterns formed as in the first method do not diverge. Owing to the setting of the amount of exposure energy to be changed at a time at the rate (e.g., 1%) to the amount of exposure energy, set parameters can be minimized in the case of production lines for a small volume and wide variety of semiconductor devices, and hence the present method is suited for a mass-production process. Since, however, the amount of exposure energy to be changed at a time is small, the convergence of the dimension of each formed resist pattern on the target dimension is slow and its followability is poor where the dimension of the resist pattern is much drifting from the predetermined standard range. It also takes time to cause the dimension of each formed resist pattern to fall within the standard range. There is also a fear of production yields of a semiconductor device being degraded.
An object of the present invention is to provide a method of manufacturing a semiconductor device, which is capable of improving the dimensional accuracy of a resist pattern.
Another object of the present invention is to provide a method of manufacturing a semiconductor device, which is capable of stably fabricating resist patterns having dimensions each

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