Fabrication method of semiconductor device with SOI structure

Details Fabrication method of semiconductor device with SOI structure Fabrication method of semiconductor device with SOI structure

1995-07-07

1997-06-10

Niebling, John

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

On insulating substrate or layer

438404, 438403, 438413, H01L 21265

Patent

active

056375131

ABSTRACT:
A fabrication method of a semiconductor device that can realize a semiconductor device having an improved radiation performance of heat together with a low parasitic capacitance between a semiconductor substrate and a conductor of the device. An SOI structure having a single-crystal silicon layer formed on an insulating substructure is prepared and then, device regions are formed on the substructure by using the single-crystal silicon layer. Sidewall insulators are formed to cover side faces of the respective device regions, laterally isolating the device regions from each other. A resistive silicon layer is formed on a non-device region of the substructure. The resistive silicon layer has a resistivity or specific resistance greater than that of the device regions. Electronic elements are formed in the device regions. The resistive silicon layer may be made of polysilicon or single-crystal silicon.

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Edward Yang, "Microelectronic Devices", 1988, pp. 67-68.
Nishizawa, H., et al., "Fully SiO.sub.2 Isolated High Speed Self-Aligned Bipolar Transistor in Thin SOI", Symposium on VLSI Technology Digest, 1991, pp. 51-52.

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