Fabrication method of nitride-based semiconductor device

Details Fabrication method of nitride-based semiconductor device Fabrication method of nitride-based semiconductor device

2011-02-22

2011-02-22

Landau, Matthew C (Department: 2813)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Compound semiconductor

C438S455000, C438S458000

Reexamination Certificate

active

07892873

ABSTRACT:
A fabrication method of a nitride-based semiconductor device includes the steps of forming a stacked structure constituted of a nitride-based semiconductor on a support substrate, depositing a first bonding metal on the stacked structure, depositing a second bonding metal on a retention substrate, bonding the first bonding metal and the second bonding metal in a state where the first bonding metal and the second bonding metal face each other to unite the retention substrate and the stacked structure, wherein the first bonding metal and the second bonding metal constitute the bonding metal, and separating the support substrate from the stacked structure for removal. The area of the surface of the retention substrate is set smaller than the area of the surface of the support substrate. Accordingly, cracking, fracture, chipping, and the like at the retention substrate can be prevented.

REFERENCES:
patent: 4605942 (1986-08-01), Camlibel et al.
patent: 6169294 (2001-01-01), Biing-Jye et al.
patent: 6177352 (2001-01-01), Schonfeld et al.
patent: 6197609 (2001-03-01), Tsutsui et al.
patent: 6201264 (2001-03-01), Khare et al.
patent: 6320206 (2001-11-01), Coman et al.
patent: 6441403 (2002-08-01), Chang et al.
patent: 6448102 (2002-09-01), Kneissl et al.
patent: 6495862 (2002-12-01), Okazaki et al.
patent: 6555847 (2003-04-01), Hata et al.
patent: 6562648 (2003-05-01), Wong et al.
patent: 6573537 (2003-06-01), Steigerwald et al.
patent: 6613461 (2003-09-01), Sugahara
patent: 6689491 (2004-02-01), Nii et al.
patent: 6723165 (2004-04-01), Ogawa et al.
patent: 6727518 (2004-04-01), Uemura et al.
patent: 6800500 (2004-10-01), Coman et al.
patent: 6967117 (2005-11-01), Horng et al.
patent: 7019323 (2006-03-01), Shakuda et al.
patent: 7439160 (2008-10-01), Le Vaillant et al.
patent: 2002/0134987 (2002-09-01), Takaoka
patent: 2003/0218179 (2003-11-01), Koide et al.
patent: 2004/0072383 (2004-04-01), Nagahama et al.
patent: 2005/0104081 (2005-05-01), Kim et al.
patent: 2005/0199885 (2005-09-01), Hata et al.
patent: 2005/0242361 (2005-11-01), Bessho et al.
patent: 2006/0006398 (2006-01-01), Hata
patent: 2006/0017060 (2006-01-01), Chen et al.
patent: 2006/0043387 (2006-03-01), Hata
patent: 2006/0043405 (2006-03-01), Hata
patent: 2006/0046328 (2006-03-01), Raffetto et al.
patent: 2006/0145159 (2006-07-01), Yokoyama et al.
patent: 2006/0151801 (2006-07-01), Doan et al.
patent: 2006/0202227 (2006-09-01), Kim et al.
patent: 2006/0226434 (2006-10-01), Hata
patent: 2006/0231852 (2006-10-01), Kususe et al.
patent: 2007/0001186 (2007-01-01), Murai et al.
patent: 2007/0102692 (2007-05-01), Asahara et al.
patent: 2008/0230904 (2008-09-01), Lee
patent: 09-008403 (1997-01-01), None
patent: 2000-252224 (2000-09-01), None
patent: 2003-347587 (2003-12-01), None
patent: 2004-72052 (2004-03-01), None
patent: 2004-266240 (2004-09-01), None
patent: 2005-311034 (2005-11-01), None
patent: 2006-49871 (2006-02-01), None
patent: 2006-73619 (2006-03-01), None
patent: 2006-73822 (2006-03-01), None
Wolf, Stanley and Richard Tauber, Silicon Processing for the VLSI Era, 2000, Lattice Press, Second Edition, vol. 1, pp. 666-667, 678, 681.
U.S. Office Action dated Feb. 23, 2007, directed to related U.S. Appl. No. 11/178,201.
U.S. Office Action dated Apr. 18, 2007, directed to related U.S. Appl. No. 11/216,547.
U.S. Office Action dated Jul. 30, 2007, directed to related U.S. Appl. No. 11/219,139.
U.S. Office Action dated Jan. 23, 2008 directed to related U.S. Appl. No. 11/178,201.
U.S. Office Action mailed Feb. 22, 2008, directed to related U.S. Appl. No. 11/219,139. 12 pages.
U.S. Office Action mailed Mar. 18, 2008, directed to related U.S. Appl. No. 11/403,511. (6 pages).
U.S. Office Action, mailed Jun. 11, 2008, directed to related U.S. Appl. No. 11/219,139. 13 pages.
U.S. Office Action mailed on Sep. 25, 2008, directed towards U.S. Appl. No. 11/403,511; 5 pages.
U.S. Office Action mailed on Dec. 10, 2008, directed towards U.S. Appl. No. 11/219,139; 10 pages.
Hata et al., U.S. Office Action mailed on Apr. 13, 2009, directed towards related U.S. Appl. No. 11/403,511; 5 pages.
Hata, U.S. Office Action mailed on Jul. 21, 2009, directed towards related U.S. Appl. No. 11/403,511; (3 pages).
Hata, U.S. Office Action mailed Mar. 30, 2010, directed to related U.S. Appl. No. 11/892,935; 15 pages.
Hata, T., U.S. Office Action mailed Oct. 5, 2010 directed to U.S. Appl. No. 11/892,935; 14 pages.

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