Fabrication method of bipolar transistor

Details Fabrication method of bipolar transistor Fabrication method of bipolar transistor

1988-09-26

1990-12-18

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437162, 437193, 437917, 148DIG10, 148DIG96, H01L 2120

Patent

active

049786300

ABSTRACT:
Present invention relates to the fabrication method of the bipolar transistor which includes NPN transistor and field-plate lateral PNP transistor.
The arsenic implanted polycrystalline silicon is used for the emitter electrode of NPN transistor to increase the current gain, and for the field-plate of the lateral PNP transistor to reduce the collector-emitter leakage current.
Also, this polycrystalline silicon is used for the ion implanting mask for the extrinsic base of the NPN transistor and for the emitter, collector of the lateral PNP transistor simultaneously.
Therefore, the extrinisc base of NPN transistor and the emitter, collector of the lateral PNP transistor are self-aligned by the polycrystalline silicon, and so one mask is saved by this method.

REFERENCES:
patent: 3915767 (1975-10-01), Welliver
patent: 4577397 (1986-03-01), Komatsu et al.
patent: 4669177 (1987-06-01), D'Arrigo et al.
patent: 4682409 (1987-07-01), Thomas et al.
patent: 4707720 (1987-11-01), Shirai et al.
patent: 4721685 (1988-01-01), Lindenfelser et al.
patent: 4755476 (1988-07-01), Bohm et al.
patent: 4769337 (1988-09-01), Maeda

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