Fabrication method in vertical integration

Fishing – trapping – and vermin destroying

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437 41, 437 59, 437915, 148DIG53, 148DIG122, H01L 21302

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051660911

ABSTRACT:
In some circuitry, field effect transistors are produced by employing polycrystalline conductive regions including the channel and connections to the source and drain. Conventional methods for producing such transistors involve depositing a thin polycrystalline channel region, patterning this region overlying the patterned region with an insulator, producing openings in the insulator for contacts to source and drain, and depositing a thick polycrystalline contact region. Processing complexity is, however, substantially reduced by first forming interconnect areas, source region and drain regions; then opening a region for the channel; and finally depositing a layer to form the channel. Thus, at least three processing steps are eliminated and vertical dimensions are reduced.

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Yamanake et al., IEDM Technical Digest, p. 48 (1988).

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