Fabrication method for stacked multi-chip package

Details Fabrication method for stacked multi-chip package Fabrication method for stacked multi-chip package

2007-02-20

2007-02-20

Clark, S. V. (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S107000

Reexamination Certificate

active

10914090

ABSTRACT:
A stacked multi-chip package includes a substrate, a first chip and a second chip. The first chip is fixed to the substrate, and is provided with a collar portion which opposes an upper face of the substrate in a state such that a gap is formed between the upper face of the substrate and the collar portion. The second chip is disposed in a region below the collar portion. The second chip is fixed to the substrate and does not make contact with the first chip.

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