Fabrication method for semiconductor integrated circuit device

Details Fabrication method for semiconductor integrated circuit device Fabrication method for semiconductor integrated circuit device

2008-05-20

2008-05-20

Goudreau, George A. (Department: 1792)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C134S001200, C438S694000, C438S718000, C438S734000, C438S739000, C438S742000

Reexamination Certificate

active

07375037

ABSTRACT:
To improve the shape of a gate electrode having SiGe, after patterning a gate electrode15G having an SiGe layer15bby a dry etching process, a plasma processing (postprocessing) is carried out in an atmosphere of an Ar/CHF3gas. Thereby, the gate electrode15G can be formed without causing side etching at two side faces (SiGe layer15b) of the gate electrode15G.

REFERENCES:
patent: 6132806 (2000-10-01), Dutartre
patent: 6200866 (2001-03-01), Ma et al.
patent: 6319840 (2001-11-01), Costrini et al.
patent: 6335266 (2002-01-01), Kitahara et al.
patent: 6344383 (2002-02-01), Berry et al.
patent: 6348420 (2002-02-01), Raaijmakers et al.
patent: 6479392 (2002-11-01), Yamazaki et al.
patent: 2805924 (2001-09-01), None
patent: 11330463 (1999-11-01), None
“High-resolution reactive ion etching and damage effects in the silicon/ germanium silicon system”; Journal of Vacuum Science & Technology: B; (1993′); 11 (6); pp. 2224-2228; Cheung et. al.
“Reactive ion etching of Si/SiGe in CF4/Ar and CI2/BCI3/Ar discharges”; Materials Chemistry and Physics; (1999′); 60 (1); Chang et. al.; pp. 22-27.
Polysilicon-Germanium Gate Patterning Studies in a High Density Plasma Helicon Souce, 1997 American Vacuum Society, pp. 1874-1880.
Germanium Etching in High Density Plasmas for 0.18 PM Conplementary Metal-Oxide-Semiconductor Gate Patterning Applications, 1998 American Vacuum Society, pp. 1833-1840.

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