Fabrication method for modified planar semiconductor structures

Fishing – trapping – and vermin destroying

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437225, 437133, 437 59, 156656, H01L 3118

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047299630

ABSTRACT:
A process for fabricating a semiconductor device or a semiconductor substrate having a first major surface on which active semiconductor devices are to be formed, and a second major surface. An etch stop layer is provided on the first major surface. A layer of semiconductor material is deposited on the etch stop layer and portions of the substrate are selectively removed to provide a pattern of apertures in the layer extending to the etch stop layer. Dopant species are provided through the second major surface to form active regions in the layer of semiconductor material.

REFERENCES:
patent: 3593067 (1967-07-01), Flynn
patent: 3604987 (1971-09-01), Assour
patent: 3617823 (1971-11-01), Hofstein
patent: 3689900 (1972-09-01), Chen
patent: 3735137 (1973-05-01), Bly
patent: 3792258 (1974-02-01), Sliker
patent: 3849678 (1974-11-01), Flynn
patent: 4142207 (1979-02-01), McCormack et al.
patent: 4143269 (1979-03-01), McCormack et al.
patent: 4354898 (1982-10-01), Coldren et al.
patent: 4416053 (1983-11-01), Figueroa et al.
patent: 4507845 (1985-04-01), McIver et al.
patent: 4534033 (1985-08-01), Nishizawa et al.
patent: 4537654 (1985-08-01), Berenz et al.
patent: 4547792 (1985-10-01), Sclar
patent: 4566171 (1986-01-01), Nelson et al.
patent: 4660208 (1087-04-01), Johnston, Jr. et al.
Ghandhi "VLSI Fabrication Principles" 1983, pp. 362-367, 476-477, 482-487, 522-523.
Arai et al., "InGaAsP/InP Buried Heterostructure Lasers" Electronics Letters vol. 16, No. 4, pp. 349-350 (S180).

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