Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-07-15
2001-07-31
Picardat, Kevin M. (Department: 2823)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S106000, C438S455000
Reexamination Certificate
active
06268225
ABSTRACT:
BACKGROUND OF THE INVENTION
a) Technical Field of the Invention
The present invention relates to a fabrication method of thin film integrated passive component with ceramic or glass materials as substrate, and to a method of thick film packaging technique of the fabricated components.
b) Description of the Prior Art
In recent years, with the widespread application of SMT technology, passive components are made into chips. Currently, thin film method and thick film method are used to form chipped integrated passive components.
U.S. Pat. No. 5,495,387 issued to Mandai et al. discloses a RC array fabricated by thick film method. As shown in
FIG. 1
of the US patent, the RC array comprises a thin laminated block
11
. Two capacitor electrodes opposite to each other are formed in the interior of this block.
The block
11
is fired at a temperature of 1,200° C. to 1,300° C. to provide a sintered body in order to form the ceramic block
11
. On the ceramic surface
12
of the ceramic block
11
, a first terminal electrode
15
, a second terminal electrode
16
, a ground terminal electrode
17
and a plurality of resistors
18
are formed, and the first terminal electrode
15
is connected to a terminal electrode of each capacitor, and one terminal of the individual resistor
18
is connected to the first terminal electrode
15
, and the other terminal of the resistor
18
is connected to the second terminal electrode
16
. The other electrodes of the individual capacitor are co-connected to the ground terminal electrode
17
. The RC array is formed from the above mentioned capacitors, the plurality of resistors
18
, the first terminal electrode
15
, the second terminal electrode
16
and the ground electrode
17
. Finally, the RC array is packaged by means of thick film packaging technology to complete the fabrication of a thick film RC integrated component
The advantage of the above RC array is that the cost of production is low. The drawbacks of the fabrication method are (i) the obtained products are not stable for the reason that the process requires high sintering temperature of above 1,000° C.; (ii) other problems exist in combination of various materials, and (iii) the size of the elements is not easy to miniaturize.
U.S. Pat. No. 5,355,014, issued to Rao, et al. discloses a method of fabricating RC integrated component by employing thin film fabricating technique, wherein conventional semiconductor fabrication technology is used to form a RC network having Schottky Diode on a silicon substrate, and then the product is packaged by IC packaging technique. Normally, this conventional technique comprises the steps of wafer polishing, wafer-chip cutting, chips mounting, wire bonding, sealing, marking, lead finish, trim/form, and packaging.
The advantages of this conventional fabricating method are (i) the RC integrated component is smaller in size, and (ii) the yield is high. However, the disadvantage is that the cost of this type of product is much higher than the similar thick film integrated passive component.
This is due to the complicated process of thin film packaging. Thus, the cost of this type of component is high.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a fabrication method for integrated passive components and the packaging method thereof by thick film packaging technique.
The fabrication method for integrated passive component in accordance with the present invention comprises the steps of providing an insulator substrate and then planarizing the insulator substrate; forming integrated passive components on the insulator substrate; and packaging the integrated passive components by a thick film packaging method.
(a) forming a substrate by using ceramic or glass materials and reducing the surface roughness of the ceramic or glass substrate by polishing or enameling;
(b) forming the required integrated passive components using the method of thinfilm process on ceramic or glass substrate, the integrated passive components including RC array components, LC array components, and RLC array components; and
(c) packaging the integrated passive components using thick film packaging method to obtain the product of an integrated passive components.
In accordance with the present invention, the fabricated passive components are miniaturized, the yield is high, and the cost of production is low.
REFERENCES:
patent: 5098528 (1992-03-01), DeLalande et al.
patent: 5495387 (1996-02-01), Mandai et al.
patent: 6021050 (2000-02-01), Ehman et al.
patent: 6083766 (2000-07-01), Chen
Chen Chun-chieh
Chen Lung-hsin
Bacon & Thomas
Collins D. M.
Picardat Kevin M.
Viking Technology Corporation
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