Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2011-06-02
2011-12-13
Trinh, Hoa B (Department: 2893)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C257SE21499
Reexamination Certificate
active
08076179
ABSTRACT:
A multi-chip module and an integrated structure of the present invention including: at least one of either a terminal unit formation area expanded type integrated circuit chip, or a terminal unit formation area identical type integrated circuit chip; terminal unit formation areas of these integrated circuits that are covered with protective layers, and expanded wiring units and terminal units formed in the protective layers; one or a plurality of the terminal unit formation area expanded type and the terminal unit formation area identical type integrated circuit chip components that are two-dimensionally or three-dimensionally aligned in further protective layers; a horizontal or a vertical wiring formed for arbitrarily connecting the plurality of the integrated circuit chip components in the further protective layers.
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Drafted Office Action issued Sep. 13, 2010 for Japanese Appln. Serial No. 2006-194792, with English translation (6 pgs.).
Office Action issued Mar. 2, 2010 for Japanese Appln. Ser. No. 2006-194792, with English translation (4 pgs.).
Office Action issued Jul. 13, 2009 on Taiwanese Pat. Appln. No. 095125776 with English translation (8 pages—Chinese, 5 pages—English).
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Lackenbach & Siegel LLP
Ryo Takatsuki
Trinh Hoa B
Young, Esq. Andrew F.
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