Fabrication method for high speed and high packing density semic

Details Fabrication method for high speed and high packing density semic Fabrication method for high speed and high packing density semic

1988-07-25

1990-09-04

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 33, 437 59, 437162, 148DIG11, 357 43, 357 34, 357 59, H01L 21225

Patent

active

049544560

ABSTRACT:
A fabrication method for a high speed and high packing density semiconductor device (BiCMOS) in which high speed polysilicon self-aligned bipolar transistors and high packing density CMOS are contained on the same wafer in such a manner that simplicity in fabrication is attained, while the high speed of operation and the high packing density of array are simultaneously realized.

REFERENCES:
patent: 4686762 (1987-08-01), Chai
patent: 4784971 (1988-11-01), Chin

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