Fabrication method for capacitor of stack-type DRAM cell

Details Fabrication method for capacitor of stack-type DRAM cell Fabrication method for capacitor of stack-type DRAM cell

1996-12-23

1997-12-02

Tsai, Jey

Fishing, trapping, and vermin destroying

437 60, 437919, H01L 218242

Patent

active

056935544

ABSTRACT:
A fabrication method for a capacitor of a stack-type DRAM cell includes forming a first insulating film, an anti-etching film, and a first conductive film on a substrate by which a switching transistor and a bit line previously are buried, forming a patterned second insulating film on the first conductive film, forming a second conductive film on the first conductive film having the patterned second insulating film thereon, dry-etching the first and second conductive film to expose a portion of the surface of the anti-etching film therethrough, forming a contact hole by etching the exposed surface of the anti-etching film and the first insulating film therebeneath, forming a third conductive film over the surfaces of the first and the second conductive films, including the contact hole therebetween, forming a planarized fourth insulating film over the third conductive film, etching the fourth insulating film to expose a portion of the surface of the anti-etching film above the bit line and then etching the third and the first conductive films, forming sidewalls composed of a fourth conductive film and forming a node electrode composed of the first through fourth conductive films.

REFERENCES:
patent: 5443993 (1995-08-01), Park et al.
patent: 5447878 (1995-09-01), Park et al.
patent: 5516719 (1996-05-01), Ryou
Watanabe, H., et al., "A New Cylindrical Capacitor Using Hemispherical Grained Si (HSG-Si) for 256Mb DRAMs," 260-IDEM '92, pp. 259-262.

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