Fabrication method for a sub-micron geometry semiconductor devic

Details Fabrication method for a sub-micron geometry semiconductor devic Fabrication method for a sub-micron geometry semiconductor devic

1992-04-01

1992-09-15

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 35, 437 40, 437912, 148DIG106, 148DIG102, H01L 21265

Patent

active

051478129

ABSTRACT:
A method for fabricating a sub-micron geometry semiconductor device using a chromeless mask. An optical exposure system (22) directs light through a chromeless mask (21). The chromeless mask (21) uses destructive interference of light to pattern a light sensitive material (32) on a semiconductor wafer (28). Phase differences in light passing thru chromeless mask (21) creates dark regions which form a non-exposed area of light sensitive material (37). The exposed light sensitive material is removed. The non-exposed area of light sensitive material (37) which remains, protects the gate material underneath it, as all other gate material is removed from the wafer. The non-exposed area of light sensitive material (37) is removed leaving a sub-micron gate (39). A drain and source is then formed to complete the device.

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