Fabrication method for a self-aligned thin film transistor havin

Details Fabrication method for a self-aligned thin film transistor havin Fabrication method for a self-aligned thin film transistor havin

1993-04-05

1994-06-28

Fourson, George

Fishing, trapping, and vermin destroying

437909, 437101, H01L 21265

Patent

active

053246748

ABSTRACT:
A thin film transistor (TFT) having reduced end leakage is fabricated by: forming a gate electrode on a substrate; forming a TFT body disposed over the gate electrode, the TFT body comprising an intrinsic semiconductor material layer, a channel plug disposed on the intrinsic semiconductor material layer over the gate electrode, a doped semiconductor material layer on the intrinsic semiconductor material and the sidewalls of the channel plug, and a source/drain metallization layer; selectively etching the source/drain metallization layer to form an address connection line and a pixel connection line to a respective source electrode tip and drain electrode tip, selectively etching the channel plug to remove the portion of the sidewalls not adjoining the source and electrode tips that had been in contact with the doped semiconductor layer; removing the doped semiconductor layer portion not underlying the address connection line, the pixel connection line, and the source and drain electrode tips; and removing the now-exposed portion of the intrinsic semiconductor layer material that had been in contact with the doped semiconductor material.

REFERENCES:
patent: 5010027 (1991-04-01), Possin et al.
patent: 5075244 (1991-12-01), Sakai et al.
patent: 5112764 (1992-05-01), Mitra et al.
patent: 5166085 (1992-11-01), Wakai et al.

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