Fabrication method for a dual gate field-effect transistor

Metal working – Method of mechanical manufacture – Assembling or joining

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29578, 29579, 357 15, 357 22, B01J 1700

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040401685

ABSTRACT:
A method for fabricating a semiconductor device having a pair of laterally spaced metal contacts adjacent a source and a drain, respectively, both contacts being located on a principal surface of a monocrystalline semiconductor, the contacts being separated by a groove therebetween. An edge of each of the contacts is extended in a cantilevered fashion over the groove, and a channel for the semiconductor is located under the groove. First and second laterally spaced Schottky-barrier gates are located in the groove adjacent the channel. In the method, the two Schottky-barrier gates are formed by deposition of a wide single gate onto a principal flat surface of the groove. The wide single gate is divided lengthwise into two separate Schottky-barrier gate conducting means by removing a portion of the gate through a photolithographically defined slot in a layer of a resistant means such as a photoresist or an ion-beam resist.

REFERENCES:
patent: 3258898 (1966-07-01), Garibotti
patent: 3634702 (1972-01-01), Drangeid
patent: 3675313 (1972-07-01), Driver
patent: 3714523 (1973-01-01), Bate
patent: 3861024 (1975-01-01), Napoli
patent: 3931674 (1976-01-01), Amelio

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