Fishing – trapping – and vermin destroying
Patent
1994-10-11
1996-06-18
Thomas, Tom
Fishing, trapping, and vermin destroying
437211, 437214, 437219, 437220, H01L 2160
Patent
active
055277411
ABSTRACT:
A method for fabricating a circuit module includes applying an outer insulative layer over a first patterned metallization layer on a first surface of a base insulative layer. A second surface of the base insulative layer has a second patterned metallization layer. At least one circuit chip having chip pads is attached to the second surface of the base insulative layer. Respective vias are formed to expose selected portions of the first patterned metallization layer, the second patterned metallization layer, and the chip pads. A patterned outer metallization layer is applied over the outer insulative layer to extend through selected ones of the vias to interconnect selected ones of the chip pads and selected portions of the first and second metallization layers.
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"A New Multichip Interconnect Technology" by Scott L. Jacobs, et al, 1989 IEPS (International Electronics Packaging Society) Conference, Sep. 1989, pp. 283-293.
Cole Herbert S.
Fillion Raymond A.
Gorowitz Bernard
Kolc Ronald F.
Wojnarowski Robert J.
Krauss Geoffrey H.
Martin Marietta Corporation
Picardat Kevin M.
Thomas Tom
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