Fabricating sub-lithographic contacts

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Thermally responsive

Reexamination Certificate

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C257S003000, C257SE45002

Reexamination Certificate

active

08067260

ABSTRACT:
A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing be overcome to provide reduced critical dimension elements.

REFERENCES:
patent: 5899722 (1999-05-01), Huang
patent: 6903031 (2005-06-01), Karim et al.
patent: 6969866 (2005-11-01), Lowrey et al.
patent: 2001/0033000 (2001-10-01), Mistry
patent: 2005/0127349 (2005-06-01), Horak et al.
patent: 2005/0263823 (2005-12-01), Hwang et al.
patent: 2006/0175597 (2006-08-01), Happ

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