Fabricating stacked chips using fluidic templated-assembly

Details Fabricating stacked chips using fluidic templated-assembly Fabricating stacked chips using fluidic templated-assembly

2006-03-28

2006-03-28

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C257S723000

Reexamination Certificate

active

07018867

ABSTRACT:
Fluidic self-assembly may be utilized to form a stack of two integrated circuits. The integrated circuits may include surface mount electrical connections and surface features that control the alignment between the integrated circuits. In particular, the contacts may be provided on one side of each integrated circuit and surface features may cause the integrated circuits to align with one another in an immersion fluid. The aligned circuits may join to form physical and electrical connections. The resulting structure may be a stack of two integrated circuits electrically coupled to one another.

REFERENCES:
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patent: 6611237 (2003-08-01), Smith
patent: 2003/0140317 (2003-07-01), Brewer et al.
Jacobs et al., “Fabrication of a Cylindrical Display by Patterned Assembly”, Science, vol. 296, pp. 323-325, Apr. 12, 2002.
Yeh et al., “Fluidic Self-Assembly For The Integration Of Gas Light-Emitting Diodes On Si Substrates”, IEEE Journal of Photonics Technology Letters, vol. 6, No. 6, pp. 706-708 Jun. 1994.
Gracias et al., “Forming Electrical Networks In Three Dimensions By Self-Assembly”, Science, vol. 289, p. 1170-72, Aug. 18, 2000.

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