Fabricating planar complementary patterned subcollectors with si

Details Fabricating planar complementary patterned subcollectors with si Fabricating planar complementary patterned subcollectors with si

1991-10-31

1994-01-18

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 59, 437108, 148DIG25, H01L 2120

Patent

active

052799875

ABSTRACT:
A process, compatible with bipolar and CMOS silicon device manufacturing for fabricating complementary buried doped regions in a silicon substrate. An N+ doped region (12) is formed in the silicon substrate by known methods of arsenic doping and drive in. This is followed by depositing a first thin epitaxial silicon cap layer (14), under conditions of minimum N+ autodoping. Part thickness of this first epilayer is converted to oxide (18), and the oxide is patterned to provide apertures in an area where it is desired to form a P+ region. A P source material (20) is deposited and a drive in anneal is used to dope the silicon with P in the areas of the oxide aperture opening. Subsequent to drive in, the dopant source layer and the oxide mask is removed by wet etching. An oxide is regrown on the surface, including the P+ region (22), and subsequently the oxide layer is stripped in dilute hydrofluoric acid. Next a second epitaxial silicon layer (28) is deposited to make up the total epi thickness to a desired value, using process conditions of minimum P doping.

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