Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
2003-07-01
2004-11-16
Trinh, Michael (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S359000, C257S617000, C257S618000, C257S629000, C438S164000
Reexamination Certificate
active
06818967
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 92108768, filed Apr. 16, 2003.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a film fabricating method and a switching element, and more particularly, to a fabricating method of a low temperature poly-silicon film and a low temperature poly-silicon thin film transistor.
2. Description of Related Art
Switches are typically disposed in the general element for driving its operation. The switches disposed in the display element are divided into an active matrix switch and a passive matrix switch. Since the active matrix disposing method is advantageous in its continuously emitting and low voltage driving, this type of disposing method has been widely applied in display elements in recent years. The switches in the active matrix display element may be a thin film transistor (TFT) or a film diode. According to the different materials used to from the channel, the thin film transistor can be an amorphous silicon (a—Si) TFT or a poly-silicon TFT. Since the poly-silicon TFT consumes lower power and has a greater electron migration rate when it is compared with the amorphous silicon TFT, it has gradually drawn more attention from the market.
Since the selection of the substrate material is significantly limited, the early age fabricating temperature of the poly-silicon TFT is up to 1000° C. However, due to the recent, great development of the laser, the fabricating temperature can be lowered to below 600° C. The poly-silicon TFT obtained from such fabricating method is called as a low temperature poly-silicon (LTPS) TFT.
FIG. 1
schematically shows a sectional view of a conventional low temperature poly-silicon film.
Referring to
FIG. 1
, in the LTPS TFT fabricating process, one of the steps is forming a poly-silicon layer
102
(poly-silicon film) on the substrate
100
, and a source/drain (not shown) and a channel (not shown) are then formed on the poly-silicon layer
102
in a subsequent fabricating process. The fabricating method of the poly-silicon layer
102
converts an original amorphous silicon layer into a poly-silicon layer via the laser crystallization or the excimer laser annealing (ELA) anneal treatment. However, after the anneal treatment is completed, a plurality of mounds
104
(as shown in
FIG. 1
) are formed on the surface of the poly-silicon layer
102
, the mounds
104
are formed due to the amorphous silicon layer being re-aligned to form the poly-silicon layer after it is re-crystallized during the annealing fabricating process. During the re-crystallization process, part of the amorphous silicon is used as a crystal seed for the re-crystallization first, then it becomes a larger crystal after the crystal grows, and the larger crystals continuously grow and, further, become integrated together to form an even larger crystal. However, during the integration process, since the crystals are impacted by the interaction resulting from its stress, some of the crystal is pushed to the surface of the poly-silicon layer
102
and thus forms the mounds
104
, wherein the height/width ratio of the mounds
104
is about 0.45 (height is 106 and width is 108).
The size of the mounds on the surface impacts the current characteristic of the LTPS TFT, especially when the size of the mounds is increased to a certain extent, the current on the TFT is then changed; thus, the emitting characteristic of the display element is impacted when these TFT are used as the switches of the display element. Further, if the sizes of the mounds are quite different, the current characteristic of each TFT in display will not be the same, and the display uniformity of the display panel is impacted accordingly. Therefore, the mound on the surface of the poly-silicon layer is a major concern of the LTPS TFT fabricating process.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a fabricating method of a low temperature poly-silicon film, so as to solve the various problems caused by the oversize of the mounds on the surface of the poly-silicon layer which is obtained by using the conventional technique.
It is an further object of the present invention to provide a LTPS TFT, so as to solve the problem of inconsistent current characteristic of the element caused by the oversize of the mounds existing on the surface of the poly-silicon layer of the conventional LTPS TFT.
The present invention provides a fabricating method of the LTPS TFT. An amorphous silicon layer is formed on a substrate first, and then a first anneal treatment is performed on the amorphous silicon layer for forming a poly-silicon layer from the amorphous silicon layer, wherein the first anneal treatment is such as a laser anneal treatment. During the anneal treatment, a plurality of mounds are formed on the surface of the poly-silicon layer, and an oxide layer is also formed on the surface of the poly-silicon layer (including the mounds). Then, the substrate is immerged into a 1% ~15% concentration hydrofluoric acid for 1~5 minutes to perform a surface etching treatment so as to remove the oxide layer. Then, a second anneal treatment is performed on the poly-silicon layer, and the second anneal treatment is such as the laser anneal treatment. After two anneal treatments, the height/width ratio of the mounds on the surface of the poly-silicon layer is less than 0.2. Optionally, in the fabricating method mentioned above, a buffer layer can be formed on the substrate and an amorphous silicon layer is formed on the buffer layer before the poly-silicon layer is formed.
A LTPS TFT provided by the present invention comprises a poly-silicon layer, a gate isolation layer, a gate, a dielectric layer, a source metal layer, and a drain metal layer. The poly-silicon layer is deposited on a substrate, and a plurality of mounds is formed on the poly-silicon layer wherein the height/width ratio of the mounds is less than 0.2. The poly-silicon layer further comprises a source/drain and a channel deposited in between the source/drain. Further, the gate isolation layer is deposited on the substrate and covers the poly-silicon layer. The gate is correspondingly deposited on the gate isolation layer which is deposited above the channel. The dielectric layer is deposited on the gate isolation layer and covers the gate and gate isolation layer. The source metal layer and the drain metal layer are deposited on the surface of the dielectric layer and in the dielectric layer and the gate isolation layer, respectively. Wherein, the source metal layer is electrically connected to the source, and the drain metal layer is electrically connected to the drain.
Therefore, the fabricating method of the low temperature poly-silicon film and the LTPS TFT mentioned above is able to solve the problem of the oversize mound formed on the surface of the low temperature poly-silicon layer in the prior art. Accordingly, the present invention can improve the current uniformity of the TFT and further improve the display uniformity of the display panel.
REFERENCES:
patent: 5888295 (1999-03-01), Sandhu et al.
patent: 5888856 (1999-03-01), Hamada
patent: 6011275 (2000-01-01), Ohtani et al.
patent: 6124154 (2000-09-01), Miyasaka
patent: 6187628 (2001-02-01), Thakur et al.
patent: 6207483 (2001-03-01), Fu et al.
patent: 6207969 (2001-03-01), Yamazaki
patent: 6281700 (2001-08-01), Matsueda
patent: 6300927 (2001-10-01), Kubota et al.
patent: 6337173 (2002-01-01), Jen et al.
patent: 6368887 (2002-04-01), Lowrey et al.
patent: 6559040 (2003-05-01), Yu et al.
Au Optronics Corporation
J.C. Patents
Soward Ida M.
Trinh Michael
LandOfFree
Fabricating method of low temperature poly-silicon film and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Fabricating method of low temperature poly-silicon film and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fabricating method of low temperature poly-silicon film and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3339652