Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-07-01
2000-05-30
Niebling, John F.
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438297, 438405, H01L 2176
Patent
active
060690550
ABSTRACT:
The fabricating method for semiconductor devices in which the trench technique is employed to perform isolation between devices, and which comprises the steps of sequentially depositing a first film 2, 3 and a second film 4 on top of a silicon substrate 1, forming an element isolation trench 5 in the silicon substrate 1 with masking of the first film 2, 3 and second film 4 which have undergone patterning, and growing a silicon oxide film 6 that is generated by reaction of ozone and tetra-ethyl-ortho-silicate inside the element isolation trench where silicon is exposed.
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Patent Abstracts Of Japan, vol. 015, No. 464 (E-1137), Nov. 25, 1991 & JP 03 198339 A (Handotai Process Kenkyusho:KK), Aug. 29, 1991.
Arai Masatoshi
Moriwaki Masaru
Segawa Mizuki
Uehara Takashi
Ukeda Takaaki
Matsushita Electric - Industrial Co., Ltd.
Murphy John
Niebling John F.
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