Fabricating dual gate thin film transistors

Details Fabricating dual gate thin film transistors Fabricating dual gate thin film transistors

1992-03-02

1993-11-30

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

257 67, 257 69, 148DIG126, H01L 21265, H01L 2700

Patent

active

052665151

ABSTRACT:
A method for fabricating a dual gate thin film transistor using a power MOSFET process having a first gate area (22) made from a monocrystalline silicon. A dielectric layer (25) is formed over the monocrystalline silicon. A first gate electrode (58) contacts the first gate area (22). A thin film transistor is fabricated on a first island of polysilicon (29) over the dielectric layer (25). The thin film transistor has a second gate electrode (55), and drain and source electrodes (56, 57) wherein the drain and source electrodes (56, 57) contact different portions of the first island of polysilicon (29). Preferably, the first gate electrode (58) is coupled to the second gate electrode (55).

REFERENCES:
patent: 3988761 (1976-10-01), Kanazawa
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patent: 4866495 (1989-09-01), Kinzer
patent: 5124769 (1992-06-01), Tanaka et al.
patent: 5144392 (1992-09-01), Brotherton
"Amorphous-Silicon thin-film metal-oxide-semiconductor Transistor" Hiroshi Hayama et al., May 1980, pp. 754-755.
"Analysis of Submicron Double-Gated Polysilicon MOS Thin Film Transistors", A. O. Adam et al., IEDM 90-3999, pp. 15.7.1-15.7.4 (1990).

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