Fabricating a semiconductor device with strained Si.sub.1-x Ge.s

Details Fabricating a semiconductor device with strained Si.sub.1-x Ge.s Fabricating a semiconductor device with strained Si.sub.1-x Ge.s

1991-06-12

1993-10-26

Kunemund, Robert

Fishing, trapping, and vermin destroying

437131, 148DIG15, 156613, 156614, 156DIG64, 156DIG67, H01L 21205

Patent

active

052565505

ABSTRACT:
The present invention comprises a method of fabricating devices and circuits employing at least one heteroepitaxial layer under strain. The thickness of the heteroepitaxial layer is more than two times the calculated equilibrium critical thickness for an uncapped heteroepitaxial layer upon a crystalline substrate, based on previously known equilibrium theory for the uncapped layer. Subsequent to growth of the heteroepitaxial layer, the structure is processed at temperatures higher than the growth temperature of the heteroepitaxial layer.
The strained heteroepitaxial layer (second layer) is epitaxially grown upon the surface of a first, underlaying crystalline layer, creating a heterojunction. Subsequently a third crystalline layer is deposited or grown upon the major exposed surface of the second, strained heteroepitaxial layer. The preferred manner of growth of the third crystalline layer is epitaxial growth. The composition of the third crystalline layer must be such that upon deposition or growth, the third layer substantially continuously binds to the heteroepitaxial structure of the second layer. Subsequent to growth of the at least three layer structure, the structure is processed at temperatures in excess of the growth temperature of the second heteroepitaxial layer. Presence of the third crystalline layer prevents the generation of a substantial amount of misfit dislocations between the first crystalline layer substrate and the second heteroepitaxial layer.

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