Fabricating a semiconductor device with reduced gate leakage

Metal working – Method of mechanical manufacture – Assembling or joining

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29576B, 29591, 148 15, 148187, H01L 21477, H01L 21425

Patent

active

046214135

ABSTRACT:
Gate current leakage is reduced in a submicron FET device by the deposition of an oxide layer over the gate prior to the rapid heating of the device. This is done to prevent the dopant that was implanted into the gate from collecting on the sidewalls of the gate and the oxide layer between gate and substrate. Otherwise the diffused dopant becomes the path of least resistance, thus creating current leakage from the gate to source or gate to drain.

REFERENCES:
patent: 3967981 (1976-07-01), Yamazaki
patent: 4229232 (1980-10-01), Kirkpatrick
patent: 4431459 (1984-02-01), Teng
patent: 4482393 (1984-11-01), Nishiyama et al.
patent: 4536223 (1985-08-01), Faith
patent: 4544418 (1985-10-01), Gibbons
patent: 4566913 (1986-01-01), Brodsky et al.
patent: 4575920 (1986-03-01), Tsunashima

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