Fabricating a field effect transistor utilizing a dummy gate

Details Fabricating a field effect transistor utilizing a dummy gate Fabricating a field effect transistor utilizing a dummy gate

1986-11-24

1988-03-01

Ozaki, George T.

Fishing, trapping, and vermin destroying

437 44, H01L 21265, H01L 21285

Patent

active

047286210

ABSTRACT:
A process for the fabrication of "low temperature"-gate MESFET structures, i.e., gate metal deposition takes place after annealing of an n.sup.+ -implant that form source- and drain- contact regions. The process permits self-alignment of all three important MESFET parts, namely, the implanted contact regions, and both, the ohmic, as well as the gate, contact metallizations. In the process, a multi-layer "inverted-T" structure is used as a mask for the n.sup.+ -implant and for the ohmic and gate metallizations. The upper part of the "inverted-T" is a so-called dummy gate which is replaced by the Schottky gate after ohmic contact metal deposition. The source-gate and drain-gate separations are determined by the shoulders of the lower layer of the "inverted-T", the shoulders being obtained using sidewall techniques.

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