Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2001-11-28
2003-04-01
Choe, Henry (Department: 2816)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S263000, C330S292000
Reexamination Certificate
active
06542032
ABSTRACT:
FIELD OF THE INVENTION
This invention generally relates to electronic systems and in particular it relates to an extremely linear, high speed, class AB rail to rail bipolar amplifier output stage with high output drive.
BACKGROUND OF THE INVENTION
As technology progresses into lower power, higher speed logic circuits, the challenges of operating analog circuits at lower power supply voltages is imminent. As a result, system designers prefer to utilize Operational Amplifiers that allow them to obtain the maximum input/output dynamic range from a given set of power supplies. This, added to the fact that gaining up an amplifier requires external resistors, gains up undesired performance (i.e., noise, offset and others) and slows down the amplifier. This is why Rail to Rail Input/Output amplifiers are becoming so popular. These, added to the low power requirements, makes the Class AB Rail to Rail Op Amps very desirable. Both flavors: high accuracy MOS applications and high drive/speed bipolar solutions are currently in high demand.
The Rail to Rail Op Amp output stage does not come without penalties. Rail to Rail operation is achieved by having a very simple output stage typically made out of a couple of output transistors connected in a common emitter or a common source configuration together with their required biasing circuitry, such as the prior art circuit shown in FIG.
1
. This type of opamp is inherently slower due to the high gain output stage. Also, due to the high output impedance and the typical asymmetrical and independent biasing of the output transistors
10
and
12
, dc and cross-over distortion sharply degrades when compared with the common collector/drain counterpart class AB output stages. Degradation worsens when driving a heavy load. The output transistors
10
and
12
have independent translinear loops
14
and
16
linearizing them. Linearization is strictly base current dependent. The result is poor DC and time dependent (AC) linearity. The impedance at the base of output transistors
10
and
12
increases as drive increases. This makes the circuit hard to compensate because the poles at output node
18
and at the base of output transistors
10
and
12
move towards each other becoming complex conjugate poles at high drive. Also, the maximum sourcing and sinking capability is limited by the input currents I
in+
and I
in−
generated by an input stage.
SUMMARY OF THE INVENTION
An amplifier output stage circuit includes: a translinear loop having first and second input nodes; a first transistor coupled between a first output node of the translinear loop and a first supply node; a first output transistor coupled between an output node of the circuit and the first supply node, and having a base coupled to a base of the first transistor; a second transistor coupled between a second output node of the translinear loop and a second supply node; a second output transistor coupled between the output node of the circuit and the second supply node, and having a base coupled to a base of the second transistor.
REFERENCES:
patent: 4857861 (1989-08-01), Seevinck et al.
patent: 5512859 (1996-04-01), Moraveji
patent: 5798673 (1998-08-01), Griffith et al.
Carreto Maria F.
Escobar-Bowser Priscilla
Brady III W. James
Choe Henry
Stewart Alan K.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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