External storage device and memory access control method thereof

Details External storage device and memory access control method thereof External storage device and memory access control method thereof

1996-07-15

1998-03-24

Canney, Vincent P.

G06F 1100

Patent

active

057322082

ABSTRACT:
High speed memory access and transparent error detection and correction using a single error correcting means are obtained. A host computer writes (2N-1)th (odd-numbered) sector data in one of the first memory and second memory (e.g., constituted by one or more memories) and 2N-th (even-numbered) sector data in the other of the first and second memory. Accordingly, (2N-1)th sector data can be read out from one of the first memory and second memory to the host computer, and at the same time (i.e., simultaneously), 2N-th sector data (i.e., next sector data to be read by the host computer) can be read out from the other of the first memory and second memory and error detection and correction can be performed in the error correcting means. Also, during a next cycle, the 2N-th (even-numbered) sector data read out from one of the first memory and second memory can be outputted to the host computer, and at the same time (i.e., simultaneously), error detection and error correction of the (2N+1)th sector data (next sector data to be read by the host computer) read out from one of the first computer and second computer can be performed in the error correcting means. Consequently, the host computer always reads sector data, and at the same time, error detection and the error correction for a next sector data are simultaneously performed thereby the time required for error detection and error correction can be reduced apparently (i.e., made transparent to the host computer 2) and memory access can be obtained.

REFERENCES:
patent: 5640506 (1997-06-01), Duffy

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