Extendible asynchronous and synchronous interface bus for...

Multiplex communications – Channel assignment techniques – Using a separate control line or bus for access control

Reexamination Certificate

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C370S439000

Reexamination Certificate

active

10072329

ABSTRACT:
Apparatus for simultaneously transferring synchronous and asynchronous signals among broadband access devices includes a data bus, a clock bus, and a plurality of control lines which are used to indicate the type of data being carried on the bus. According to the methods of the invention, data is transferred on the bus in a repeating frame having a plurality of slots, each slot being defined as one bus clock cycle. Each slot may contain a synchronous or asynchronous data signal and one or more of the control lines are asserted during the slot time of the data to indicate the type of data. Two embodiments are provided. One utilizes a 25 MHz clock bus and a repeating frame of three hundred thirty-six slots. The other utilizes a 75 MHz clock bus and a repeating frame of one thousand eight slots.

REFERENCES:
patent: 3982077 (1976-09-01), Clark et al.
patent: 3985962 (1976-10-01), Jones et al.
patent: 4149144 (1979-04-01), Diefender
patent: 4156798 (1979-05-01), Doelz
patent: 4375681 (1983-03-01), Abbott et al.
patent: 4460993 (1984-07-01), Hampton et al.
patent: 4488293 (1984-12-01), Haussmann et al.
patent: 4535448 (1985-08-01), Baxter et al.
patent: 4660169 (1987-04-01), Norgren et al.
patent: 4685101 (1987-08-01), Segal et al.
patent: 4727536 (1988-02-01), Reeves et al.
patent: 4750168 (1988-06-01), Trevitt
patent: 4763320 (1988-08-01), Rudolph et al.
patent: 4789926 (1988-12-01), Clarke
patent: 4815074 (1989-03-01), Jacobsen
patent: 4817037 (1989-03-01), Hoffman et al.
patent: 5048012 (1991-09-01), Gulick et al.
patent: 5084872 (1992-01-01), Le Cucq et al.
patent: 5150359 (1992-09-01), Wilson et al.
patent: 5163048 (1992-11-01), Heutink
patent: 5172373 (1992-12-01), Suzuki
patent: 5263023 (1993-11-01), Sevenhans et al.
patent: 5276678 (1994-01-01), Hendrickson et al.
patent: 5299193 (1994-03-01), Szczepanek
patent: 5339395 (1994-08-01), Pickett et al.
patent: 5452330 (1995-09-01), Goldstein
patent: 5546392 (1996-08-01), Boal et al.
patent: 5572686 (1996-11-01), Nunziata et al.
patent: 5901146 (1999-05-01), Upp
patent: 6104724 (2000-08-01), Upp
patent: 6119188 (2000-09-01), Sheafor et al.
patent: 6240087 (2001-05-01), Cummings et al.
patent: 6275499 (2001-08-01), Wynn et al.
patent: 6414966 (2002-07-01), Kulkarni et al.
patent: 6457090 (2002-09-01), Young
patent: 6535520 (2003-03-01), Hann et al.
patent: 6667973 (2003-12-01), Gorshe et al.
patent: 6724772 (2004-04-01), Borland et al.
patent: 6768745 (2004-07-01), Gorshe et al.
patent: 6996125 (2006-02-01), Kfir et al.

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