Fishing – trapping – and vermin destroying
Patent
1989-07-19
1991-09-03
Prenty, Mark
Fishing, trapping, and vermin destroying
357 67, 357 43, 357 231, 437188, 437202, H01L 2348, H01L 2702, H01L 2978, H01L 2144
Patent
active
050459163
ABSTRACT:
There is disclosed a process for making high performance bipolar and high performance MOS devices on the same integrated circuit die. The process comprises forming isoaltion islands of epitaxial silicon surrounded by field oxide and forming MOS transistors having polysilicon gates in some islands and forming bipolar transistors having polysilicon emitters in other islands. Insulating spacers are then formed around the edges of the polysilicon electrodes by anisotropically etching a layer of insulation material, usually thermally grown silicon dioxide covered with additional oxide deposited by CVD. A layer of refractory metal, preferably titanium covered with tungsten, is then deposited and heat treated at a temperature high enough to form only titanium disilicide to form silicide over the tops of the polysilicon electrodes and on top of the bases, sources and drains. Regions of this refractory metal are then masked off such that the electrical contact with the silicide is preserved and so that the refractory metal extends to a contact pad position external to the isolation island. Metal posts can be formed at the contact pad positions and a layer of planarized insulation material is formed so to leave only the tops of the posts exposed. A layer of metal can then be deposited and etched to make electrical contact with tops of the posts.
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Burton Gregory N.
Kapoor Ashok K.
Vor Madhukar B.
Colwell Robert C.
Fairchild Semiconductor Corporation
Norviel Vern
Patch Lee
Prenty Mark
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