Electrical computers and digital processing systems: processing – Instruction decoding
Reexamination Certificate
2007-06-12
2007-06-12
Kim, Kenneth S. (Department: 2111)
Electrical computers and digital processing systems: processing
Instruction decoding
C712S228000
Reexamination Certificate
active
11034559
ABSTRACT:
An extended register processor includes a register file having a legacy register set and an extended register set. The extended register set includes a plurality of extended registers accessible only to extended register instructions. The processor maps extended register references to physical extended registers at run time. The processor includes a configurable extended register mapping unit to support this functionality. The mapping unit is accessible to an instruction decoder, which detects extended register references and forwards them to the mapping unit. The mapping unit returns a physical extended register corresponding to the extended register reference in the instruction. The mapping unit is configurable so that, for example, the mapping is specific to a code block. An extended register allocation instruction causes the processor to allocate a portion of the extended register set to the code block in which the declaration is located and to configure the mapping unit to reflect the allocation.
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Gheith Ahmed
Peterson James Lyle
Simpson Richard Ormond
Dillon & Yudell LLP
International Business Machines - Corporation
Kim Kenneth S.
Salys Casimer K.
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