Extended frequency range voltage-controlled oscillator

Details Extended frequency range voltage-controlled oscillator Extended frequency range voltage-controlled oscillator

2002-01-22

2003-09-16

Choe, Henry (Department: 2817)

Oscillators

Ring oscillators

C331S175000, C327S108000

Reexamination Certificate

active

06621360

ABSTRACT:

TECHNICAL FIELD
The invention provides a wide frequency range voltage-controlled oscillator (VCO) which utilizes negative feedback of the control voltage output by a phase locked loop (PLL) to adjust the VCO's frequency.
BACKGROUND
Phase-locked loops (PLLs) are widely used in a variety of communications and control systems applications, including frequency synthesis, clock recovery, signal modulation and signal demodulation applications. A typical analog PLL incorporates a phase detector, a voltage-controlled oscillator (VCO) and a low pass filter. In some applications, it is desirable that the frequency of the VCO's output clock signal be variable within a wide frequency range.
FIG. 1
schematically depicts a voltage-controlled ring oscillator—a common prior art VCO architecture formed by connecting a plurality of delay cells
10
,
12
. . .
14
in a closed loop. The output clock frequency is determined by the delay contributed by each delay cell, which is in turn controlled by the PLL's output control voltage VC, as shown schematically in
FIG. 2
for a representative delay cell D. If the
FIG. 1
VCO is to be variable within a wide frequency range, then each delay cell must have a correspondingly wide delay tuning range.
Each delay cell D typically comprises two transistors (not shown) coupled to form a differential pair, and some active loading components (not shown). Each delay cell D sinks a tail current I
tail
through voltage-to-current converter
16
. Each delay cell D's delay value is determined by that cell's I
tail
value, which is in turn determined by the control voltage VC. Accordingly, the delay tuning range of each delay cell D is limited by the voltage range within which VC can be varied, which is in turn constrained by the power supply voltage, i.e. 0≦VC≦V
dd
. More particularly delay cell D's output frequency f is a function of both I
tail
and VC. Consequently, and as shown in
FIG. 3
, if I
tail
is too small, f is constrained within a relatively low frequency sub-range [f
L1
,f
H1
] as indicated at
18
; whereas, if I
tail
is too large, f is constrained within a relatively high frequency sub-range [f
L2
,f
H2
] as indicated at
20
.
If an offset current source
22
is connected in parallel across voltage-to-current converter
16
as shown in
FIG. 4
, then the output frequency f can be controlled as a function of both the tail current I
tail
sunk through voltage-to-current converter
16
(which is determined by VC as aforesaid) and the offset current I
offset
sunk through offset current source
22
. A digital counter or similar means (not shown) can be used to control offset current source
22
so as to vary I
offset
through a range of discrete values I
offset1
, I
offset2
, I
offset3
, I
offset4
, I
offset5
, etc. By selectably controlling I
offset
in this fashion one may select any one of a corresponding number of discrete frequency operating sub-ranges [f
L1
,f
H1
], [f
L2
,f
H2
], [f
L3
,f
H3
], [f
L4
,f
H4
], [f
L5
,f
H5
], etc. as indicated at
24
,
26
,
28
,
30
,
32
respectively in FIG.
5
.
The discrete I
offset
values, and consequently the discrete frequency operating sub-ranges of the
FIG. 4
apparatus are undesirably affected by changes in integrated circuit process and operating temperature conditions. The
FIG. 4
apparatus also requires presetting of digital registers, initialization of comparator reference voltages, or some similar operation in order to select a particular one of the discrete frequency operating sub-ranges. It is difficult to ensure that all such preset or initialization values will produce the desired frequency operating sub-range under all integrated circuit process and operating temperature conditions which are likely to be encountered. Moreover, the PLL locking time is increased by the delay inherent in changing the preset or initialization values in order to select a different frequency operating sub-range.
SUMMARY OF INVENTION
The invention provides a method and apparatus for continuously varying VCO frequency through a wide frequency range in proportion to a first control voltage VC produced by a PLL containing the VCO. A second control voltage NVC is produced as a monotonically decreasing function of VC. A first current I
0
is produced in proportion to VC and a second current I
1
is produced in proportion to NVC. I
1
is subtracted from I
0
, producing a control current IC=I
0
-I
1
which is applied to the VCO.


REFERENCES:
patent: 5285059 (1994-02-01), Nakata et al.
patent: 5818304 (1998-10-01), Hogeboom
patent: 6072372 (2000-06-01), Yokoyama
patent: 6188289 (2001-02-01), Hyeon
patent: 6275116 (2001-08-01), Abugharbieh et al.
patent: 6466100 (2002-10-01), Mullgrav, Jr. et al.

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