Boots – shoes – and leggings
Patent
1986-10-06
1989-06-20
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 900
Patent
active
048414760
ABSTRACT:
In a system which emulates execution of source CPU instructions and includes a translating unit (translator) for converting source instructions to target instructions and a target CPU instruction unit for processing and issuing translated target instructions, provision is made for accelerating instruction, translation, issue, and execution when certain source floating point arithmetic instructions are emulated for execution. When a source floating point arithmetic instruction is emulated, a token is placed in a wait queue in the translator to prevent the translation of any source instructions and issue of any target instructions until condition and interrupt information is available and validated. In addition, emulation of source RX-type floating point instructions is enhanced by provision of registers in the instruction unit which receive X-field denoted operands, and which thereby permit a target CPU execution unit to perform the emulation by conducting register-to-register operations.
REFERENCES:
patent: 3881173 (1975-04-01), Larsen et al.
patent: 4587612 (1986-05-01), Fisk et al.
George Radin, "The 801 Minicomputer", IBM J. Res. Develop., vol. 27, No. 3, May 1983.
Bechdel John F.
Mitchell James A.
International Business Machines - Corporation
Mills John G.
Shaw Gareth D.
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