Extended bitstream and generation thereof for dynamically...

Coded data generation or conversion – Digital code to digital code converters – Adaptive coding

Reexamination Certificate

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C341S106000, C341S001000

Reexamination Certificate

active

07385532

ABSTRACT:
An extended bitstream, and generation thereof, for dynamically configuring a decoder. Content data is obtained to be encoded. Build settings are obtained for configuring the decoder. The content data is encoded with an encoder to provide encoded data. A configuration bitstream is generated for configuring programmable logic responsive to the build settings. The configuration bitstream is combined with the encoded data to provide the extended bitstream. The extended bitstream is self-contained to allow for configuring of the programmable logic to dynamically instantiate the decoder to decode the encoded data.

REFERENCES:
patent: 6366224 (2002-04-01), Cliff et al.
patent: 7028283 (2006-04-01), Keller et al.
patent: 7262719 (2007-08-01), Rijavec
patent: 2007/0043575 (2007-02-01), Onuma et al.
patent: 2008/0021712 (2008-01-01), Fejzo
Xilinx, Inc., U.S. Appl. No. 11/433,126 by Schumacher et al. filed May 12, 2006.

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