Extendable squarer and operation method for processing...

Details Extendable squarer and operation method for processing... Extendable squarer and operation method for processing...

2004-07-26

2008-05-13

Mai, Tan V. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07373370

ABSTRACT:
An extendable squarer for processing digital signals, suitable for processing a square operation for n-bit data is disclosed. The extendable squarer comprise a bit expanding circuit and a plurality of operating units. The bit expanding circuit comprises n−1 bit expanding output terminals for outputting a plurality of bit expanding data. The operation units receive a plurality of bit codes of the n-bit data corresponding thereto according to the binary weight. In addition, except for bit code of the most-significant bit, the other operation units receive the corresponding bit expanding data output by the bit expanding circuit respectively. The present invention generates the square operation value of the n-bit data based on the corresponding bit expanding data and bit codes.

REFERENCES:
patent: 5337267 (1994-08-01), Colavin
patent: 6260056 (2001-07-01), Dalal
patent: 6393453 (2002-05-01), Purcell
patent: 6460065 (2002-10-01), Purcell

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