Exposure methods for overlaying one mask pattern on another

Radiation imagery chemistry: process – composition – or product th – Registration or layout process other than color proofing

Reexamination Certificate

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Details

C430S030000

Reexamination Certificate

active

06331369

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an exposure method for transferring a mask pattern onto a photosensitive substrate during photolithography processes in the manufacture of semiconductor devices, liquid crystal display devices, imaging devices (e.g. CCD), thin-film magnetic heads, etc. More particularly, the present invention relates to an exposure method which is suitably applied to a process in which exposure is sequentially carried out by the mix-and-match method with respect to two layers, that is, a layer called “middle layer”, which requires no high resolution, such as an ion-implanted layer used in production of a semiconductor memory or the like, and a layer called “critical layer”, which requires high resolution.
2. Related Background Art
Exposure apparatuses, e.g. step-and-repeat reduction projection type exposure apparatuses (steppers), are used in photolithography processes for producing semiconductor devices, liquid crystal display devices, etc. Generally, a semiconductor device such as a VLSI is formed by stacking a multiplicity of pattern layers on a wafer while effecting alignment for each layer. Among the pattern layers, a layer that needs the highest resolution is called “critical layer”, and a layer that needs no high resolution, e.g. an ion-implanted layer used in production of a semiconductor memory or the like, is called “middle layer”. In other words, the line width of a pattern which is exposed for the middle layer is wider than the line width of a pattern exposed for the critical layer.
There has been an increasing tendency for recent VLSI manufacturing factories to carry out exposure operations for different layers by using respective exposure apparatuses in a process for producing a single type of VLSI in order to increase the throughput (i.e. the number of wafers processed per unit time) in the production process. Under these circumstances, it has become common practice to carry out what is called “mix-and-match” exposure. In the mix-and-match exposure process, exposure for the critical layer is carried out by using a first stepper of high resolution which performs one-shot exposure with a demagnification ratio of 5:1, and exposure for the middle layer is carried out by using a second stepper of intermediate resolution which performs one-shot exposure with a demagnification ratio of 2.5:1. In this case, the size of the exposure field of the second stepper is twice as large as that of the first stepper in both lengthwise and breadthwise directions, and the throughput of the second stepper in the exposure process is approximately four times that of the first stepper. This will be explained below with reference to FIG.
35
.
Assuming that, as shown in
FIG. 35
, exposure units on a wafer which are to be exposed by the first stepper are square shot areas SA
11
, SA
12
, SA
13
, SA
14
, . . . each surrounded by sides which are parallel to X- and Y-axes perpendicularly intersecting each other, an exposure area which is to be exposed by the second stepper is a shot area SB
1
which is so large as to substantially contain the four shot areas SA
11
to SA
14
. When exposure is to be carried out by the second stepper over the four shot areas SA
11
, SA
12
, SA
13
and SA
14
exposed by the first stepper, the second stepper effects alignment of the shot area SB
1
, which corresponds to the exposure field of the second stepper, on the basis of alignment marks (wafer marks) attached to the shot areas SA
11
to SA
14
.
There is another conventional exposure method in which, for example, a step-and-scan type scanning exposure apparatus with a demagnification ratio of 4:1 is combined with either the above-described first or second stepper. The step-and-scan exposure is a process in which a shot area on a wafer which is to be exposed is stepped to a scanning start position, and thereafter a reticle, which serves as a mask, and the wafer are synchronously scanned with respect to a projection optical system, thereby sequentially transferring a pattern on the reticle onto the shot area. The exposure field of the scanning exposure apparatus is equal, for example, in the width of the non-scanning direction to the exposure field of the first stepper, but the exposure field width in the scanning direction of the scanning exposure apparatus is 1.5 times that of the first stepper. It should be noted that there are various combinations of different exposure field sizes of a plurality of exposure apparatuses used in the mix-and-match exposure method in addition to the above-described combinations.
Thus, the throughput of an exposure process can be increased by carrying out a mix-and-match exposure process using different exposure apparatuses in combination according to the resolution required for each layer on a wafer as described above. However, when exposure apparatuses having respective exposure fields of different sizes are used in combination, if a perpendicularity error remains in the array of shot areas (i.e. shot array) of the preceding layer, i.e. if the angle between the X- and Y-axes of the shot array deviates from 90°, a given overlay error arises. Such a perpendicularity error is due to the fact that the feed directions of the wafer stage driven by motors are not accurately perpendicular to each other.
For example, assuming that in
FIG. 35
the imaginary straight line
23
A passing through the centers of the shot areas SA
13
and SA
14
in the four shot areas of the preceding layer is parallel to the X-axis, if the angle between the X- and Y-axes of the shot array deviates from 90° by an angle (perpendicularity error) W, the imaginary straight line
24
passing through the centers of the shot areas SA
11
and SA
13
tilts by the perpendicularity error W [rad] relative to the Y-axis. In this case, if exposure is carried out with the center of the subsequent shot area SB
1
aligned with the center
25
of the four shot areas SA
11
, SA
12
, SA
13
and SA
14
, which have the perpendicularity error W, a uniform overlay error &Dgr;x arises in the direction X between the pattern in the shot area SB
1
and the pattern in each of the shot areas SA
11
to SA
14
of the preceding layer. Assuming that the length of each side of the shot area SA
11
is L, the overlay error &Dgr;x is approximately L·W/2.
In a case where each shot area of the preceding layer has a shot rotation (chip rotation) also, an overlay error arises which is similar to that in a case where the angle between the X- and Y-axes of the shot array deviates from 90°.
FIG. 36
shows the four shot areas SA
11
to SA
14
in a situation where the perpendicularity error of the shot array is zero, but the shot rotation is &thgr; [rad]. Let us assume that the shot rotation &thgr; is of the same size as the perpendicularity error W in FIG.
35
. In the case of
FIG. 36
, even if the subsequent shot area SB
1
is exposed by rotating it simply through an angle corresponding to the shot rotation &thgr;, a uniform overlay error &Dgr;x of the same size as that in the case of
FIG. 35
arises in the direction of the shot rotation between the pattern in the shot area SB
1
and the pattern in each of the shot areas SA
11
to SA
14
of the preceding layer.
That is, when exposure is sequentially carried out by using exposure apparatuses having respective exposure fields of different sizes, if the array of shot areas of the preceding layer has a perpendicularity error or a shot rotation, a uniform overlay error arises if the subsequent shot areas are simply aligned with respect to the preceding shot areas.
On the other hand, in the above-described mix-and-match method, in which after a layer on a wafer has been exposed by a first exposure apparatus, overlay exposure is carried out on the preceding layer by using a second exposure apparatus, the second exposure apparatus may effect alignment by an enhanced global alignment (hereinafter referred to as “EGA”) method as disclosed, for example, in Japanese Patent Application Unexamined Publication (KOKAI) (her

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