Photocopying – Projection printing and copying cameras
Reexamination Certificate
1999-09-20
2001-05-29
Adams, Russell (Department: 2851)
Photocopying
Projection printing and copying cameras
C355S053000, C355S054000, C355S077000, C250S548000, C430S311000, C430S312000
Reexamination Certificate
active
06239858
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an exposure method, an exposure apparatus and a semiconductor device manufactured by using the exposure apparatus. More specifically, the present invention relates to an exposure apparatus capable of reducing stage matching error, which is a registration error generated when a plurality of exposure apparatuses are used, and to a semiconductor device manufactured by using the exposure method.
2. Description of the Background Art
Conventionally, an apparatus called a stepper has been known as an exposure apparatus used for manufacturing a semiconductor device. In the stepper, a semiconductor wafer is moved stepwise in X-Y direction below a projection lens, while an exposure pattern image formed on a reticle is reduced by the projection lens and the image is exposed successively on each shot area of one semiconductor wafer.
Various methods for improving registration accuracy have been employed for the stepper. An alignment method disclosed in Japanese Patent Laying-Open No. 61-44429, for example, has been known as a method of improving registration accuracy.
The aforementioned alignment method disclosed in Japanese Patent Laying-Open No. 61-44429 will be described with reference to FIG.
9
.
FIG. 9
is a schematic flow chart of an exposure sequence using EGA (Enhanced Global Alignment) method described in Japanese Patent Laying-Open No. 61-44429.
Referring to
FIG. 9
, a semiconductor wafer is subjected to pre-alignment, using an orientation flat of the semiconductor wafer (step D
10
).
Thereafter, using a WGA (Wafer Global Alignment) mark formed in each shot area, the semiconductor wafer is rotated for correction (step D
11
).
Thereafter, a stage on which the semiconductor wafer is mounted is moved in accordance with a design value of chip arrangement, and for a plurality of shot areas selected in advance for error detection, an LSA alignment mark position of print pattern is detected by an LSA (Laser Step Alignment) optical system (actually measured value). At the same time, the position of the wafer stage is detected by a laser interferometer (design value).
Based on the detected actual measured value and the design value, registration error between the print pattern on the semiconductor wafer and the reticle pattern image is detected (step D
12
).
Thereafter, based on the design value and the actually measured value, error parameter is determined by least square method. More specifically, registration error in each shot area and deviation from a position coordinate (coordinate of the print pattern) on the wafer stage are found. An average value of the deviation is calculated as a correction value (error parameter) (step D
13
).
Using the error parameter and the design value, a chip arrangement map is formed in which rotation error, perpendicularity, base line error and scaling error in each shot area are corrected (step D
14
).
Thereafter, in accordance with the chip arrangement map, the wafer stage is positioned by step and repeat method (step Dl
5
). Thereafter, each shot area is exposed (step D
16
).
The exposure method using the EGA method described above utilizes four correction values (error parameters), that is, base line correction, rotation correction, perpendicularity correction and scaling correction. An exposure pattern is obtained with registration accuracy improved by using these four correction values.
Now, in the exposure method based on the EGA method using the aforementioned four correction values, the errors to be corrected are linear errors experienced when the semiconductor wafer is placed on the wafer stage. When first and second exposure steps are performed by one exposure apparatus, non-linear errors inherent to the exposure apparatus including an error derived from distortion of an interference mirror and peculiar tendency of travel of the stage do not cause any problem, as such errors are cancelled.
When the exposure steps are performed by using a plurality of exposure apparatuses, non-linear errors of the exposure apparatuses differ apparatus by apparatus. Accordingly, the non-linear errors cannot be cancelled among the exposure apparatuses, resulting in lower registration accuracy.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an exposure method, an exposure apparatus and a semiconductor device manufactured by using the exposure apparatus which can reduce as much as possible an influence of non-linear error generated among exposure apparatuses, even when a plurality of exposure apparatuses are used.
The exposure apparatus and the exposure method in accordance with the present invention are used for manufacturing a semiconductor device, and the present invention includes a step of correction for equalizing non-linear error of the exposure apparatus with non-linear error of another exposure apparatus.
As the step of correction is included, influence of non-linear error generated among exposure apparatuses can be minimized, even when a plurality of exposure apparatuses are used.
As a result, lowering of registration accuracy experienced when a plurality of exposure apparatuses are used can be prevented. Further, extensive operation of one exposure apparatus is avoided, non-operation or idling of other exposure apparatuses is avoided, possible delay in developing products caused by failure or malfunction of an exposure apparatus is prevented, considerable cost can be reduced when the exposure apparatus is installed in a plant, and accordingly, manufacturing cost of the semiconductor device can be reduced.
In order to implement the present invention in a more preferable state, the above described step of correction includes: a first exposure step of forming a prescribed first pattern on a resist film on a semiconductor substrate by using the aforementioned another exposure apparatus including a reticle with a prescribed exposure pattern; a second exposure step of forming a second pattern on the resist film having the first pattern, using the aforementioned exposure apparatus itself including the reticle with the same exposure pattern; a correction data calculating step of calculating linear error of the aforementioned another exposure apparatus with respect to non-linear error of the aforementioned exposure apparatus itself, based on error information between patterns obtained from the first and second patterns; and a non-linear error correcting step, based on the information obtained by the correction data calculation, of making the non-linear error of the aforementioned exposure apparatus itself equal to the non-linear error of the aforementioned another exposure apparatus.
Further, for higher accuracy of the correction step, the first exposure step has a first shot area exposure step of exposing the first pattern on respective ones of matrix-shaped shot areas arranged in m rows×n columns (m, n are integers) on a resist film of the silicon wafer, the second exposure step has a second shot area exposure step of exposing the second pattern on each of the m×n shot areas, and the correction data calculation step has averaging step of calculating the amount of misalignment between the first and second patterns formed on a selected plurality of shot areas, and calculating an average amount of misalignment of each shot area.
For higher efficiency of the correction step, four shot areas approximately at the center among m×n shot areas are selected in the averaging step.
For higher precision of the correction step, the first and second patterns are formed on m×n shot areas of each of at least ten semiconductor substrates.
According to the present invention, the semiconductor device is manufactured using at least two exposure apparatuses, one of which has a correction step for making non-linear error of one exposure apparatus equal to non-linear error of another exposure apparatus.
As the correction step is provided, influence of the non-linear error generated among exposure apparatuses on the semiconductor device can be m
Adams Russell
Brown Khaled
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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