Image analysis – Applications – Manufacturing or product inspection
Reexamination Certificate
1998-10-06
2004-05-25
Werner, Brian (Department: 2721)
Image analysis
Applications
Manufacturing or product inspection
C382S145000, C382S148000, C382S151000, C438S007000, C438S016000
Reexamination Certificate
active
06741732
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an exposure method of forming a fine pattern such as a semiconductor device using both an optical reduction projection exposure apparatus represented by a stepper and a scanner represented by an electron beam drawing apparatus, and a device manufacturing method using this exposure method.
2. Description of the Related Art
Strong demand has recently arisen for a higher packing density and a higher integration degree of semiconductor integrated circuits. In particular, the purpose of obtaining a high integration degree having a line width of 0.15 &mgr;m or less cannot be achieved by use of a conventional exposure apparatus using light (including an X-ray). Patterns must be drawn using electron beams or ion beams. This exposure using a scanner suffers a low throughput as compared with an optical exposure apparatus. A mix-and-match method (or hybrid exposure) for exposing a layer allowing a relatively low resolution with an optical exposure apparatus and a layer requiring a high resolution or high accuracy with a scanner has been proposed (e.g., Japanese Patent No. 2625124 and Japanese Patent Laid-Open Nos. 62-58621 and 62-149127).
In this mix-and-match method, an exposed pattern distorts due to the behaviors (mainly aberrations) of the projection optical system for forming a reticle pattern on a wafer serving as a sample in the optical reduction projection exposure apparatus. Exposure using the scanner allows relatively free control for a beam irradiated position.
In the mix-and-match method in, e.g., Japanese Patent Laid-Open No. 62-58621, a large number of exposure distortion measurement marks are formed in a matrix at almost the central portion of a wafer in a square area corresponding to the maximum exposure area of the optical reduction projection exposure apparatus. The positions of these marks are actually measured, and an exposure distortion amount per correction field (correction block) having an area of 250 &mgr;m□ (i.e., an area having one side of 250 &mgr;m) within the above area is obtained. A map representing the distribution of exposure distortion amounts (to be referred to as a map hereinafter) is stored in the memory of a charged beam drawing apparatus. The charged beam drawing apparatus corrects drawing data in accordance with the exposure distortion and draws a pattern. As described above, the drawing pattern is distorted in accordance with the distortion of the pattern formed by exposure using the optical reduction projection exposure apparatus, which distortion is caused by the aberrations of the projection optical system of the exposure apparatus. A highly accurately matched pattern is drawn on the exposure pattern. In this case, the blocks of the matrix are arranged at an equal pitch, as shown in FIG.
8
A.
FIG. 8A
shows an ideal matrix.
FIG. 8B
shows a matrix distorting due to the aberrations of the projection optical system, assuming that the ideal matrix in
FIG. 8A
is printed on the wafer by the optical reduction projection exposure apparatus.
To increase the overlay accuracy, the block pitch must be decreased to increase the map accuracy in the blocks having an equal pitch as shown in the conventional case. The term overlay accuracy is generally understood in the art to refer to a measure of accuracy between two patterns. For example, as the block pitch decreases to ½, the number of intersections between the vertical and horizontal lines of the matrix (the intersections are referred to as matrix points hereinafter), i.e., the number of distortion data points, increased by a factor of four. That is, the number of matrix points increases in proportion to the square of the number of vertical or horizontal lines of the matrix. Therefore, the data amount greatly increases accordingly.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the conventional problems described above, and has as its object to increase the overlay accuracy while suppressing an increase in the memory size of a distortion correction map in a mix-and-match method.
In order to achieve the above object, an exposure method and a device manufacturing method using this exposure method according to the present invention are constituted as follows.
That is, an exposure method of drawing and exposing a second pattern with a scanner so as to match a first pattern formed on a sample upon exposure with a reduction projection exposure apparatus, comprises the steps of:
setting a matrix on the sample;
forming a distortion correction map representing an offset of a point corresponding to each matrix point on the first pattern from an ideal position; and
setting a block of the matrix small for a large offset and large for a small offset when drawing the second pattern while correcting drawing information of the second pattern on the basis of offset information represented by the correction map.
A device manufacturing method including an exposure step comprises the step of manufacturing a device by performing exposure using the exposure method.
According to a preferred embodiment of the present invention, the exposure method comprises the step of setting a size of the block on the basis of an overlay accuracy required in drawing the second pattern on the first pattern.
According to another preferred embodiment of the present invention, the exposure method comprises the step of drawing the second pattern prior to the first pattern.
According to still another preferred embodiment of the present invention, the exposure method comprises the step of drawing the first pattern prior to the second pattern.
According to still another preferred embodiment of the present invention, in the exposure method, the block size of a portion having the large offset is 50 &mgr;m□ to 1,000 &mgr;m□.
According to still another preferred embodiment of the present invention, in the exposure method, the block size of a portion having the large offset is 50 &mgr;m□ to 1,000 &mgr;m□.
According to still another preferred embodiment of the present invention, in the exposure method, the scanner is an electron beam drawing apparatus.
According to still another preferred embodiment of the present invention, the exposure method comprises the step of changing the block size to an optimal block size for performing distortion correction on the basis of a measured distortion amount.
According to still another preferred embodiment of the present invention, the exposure method comprises the step of performing coarse setting for the block size by thinning distortion data of the matrix points in accordance with a distortion difference between adjacent matrix points.
According to still another preferred embodiment of the present invention, the exposure method comprises the step of performing fine setting for the block size by adding distortion data of the matrix points in accordance with a distortion difference between adjacent matrix points.
Other features and advantages of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof.
REFERENCES:
patent: 4621371 (1986-11-01), Gotou et al.
patent: 4812661 (1989-03-01), Owen
patent: 5276519 (1994-01-01), Richards et al.
patent: 5308991 (1994-05-01), Kaplan
patent: 5773836 (1998-06-01), Hartley
patent: 5848197 (1998-12-01), Ebihara
patent: 5978081 (1999-11-01), Michael et al.
patent: 62-58621 (1987-03-01), None
patent: 62-149127 (1987-07-01), None
patent: 2625124 (1997-04-01), None
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Werner Brian
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