Exposure mask with appended mask error data

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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Details

C430S022000

Reexamination Certificate

active

06720117

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention concerns an exposure mask and a method for producing a semiconductor device using the mask and, more in particular, it relates an exposure mask particularly suitable to improve the accuracy of alignment in the exposure step and a method for producing a semiconductor device.
2. Related Art
In the production for a semiconductor device, a circuit pattern for the semiconductor device is formed by transferring a pattern formed on an exposure mask (hereinafter referred to as a mask) on a semiconductor wafer coated with a photoresist (hereinafter referred to as a wafer). The semiconductor device comprises a plurality layers of circuit patterns and exposure of a circuit pattern of a certain layer needs positional alignment with a circuit pattern of a lower layer (alignment).
FIG. 5
is a constitutional view of a step and repeat type exposure system. A wafer
55
is placed on a wafer stage
54
and a reference mark plate
557
is fixed on the wafer stage
54
near the wafer
55
. Then, images of a pattern on a mask
512
are projected and exposed by an exposure light from an illumination optical system not illustrated to each of shot regions on the wafer
55
by way of a projection optical system
58
. In this case, since the wafer stage
54
is driven along a wafer coordinate system, it is necessary to measure the position at the wafer coordinate system of the mask
512
and angle of rotation of the mask
512
to the wafer coordinate system. For this purpose, two alignment marks (reticule mark)
560
R and
561
R are formed opposed to each other near the pattern area of the mask
512
, and two reference marks
560
F and
561
F are formed on the reference mark plate
557
at a distance equal with the designed distance for the reticule marks
560
R and
561
R on the wafer
5
.
Further, alignment microscopes
558
and
559
are disposed above the reticule marks
560
R and
561
R on the mask
512
respectively. Each of the alignment microscopes
558
and
559
has an illumination light source (not illustrated) for emitting an alignment light at the same wavelength as that of the exposure light and a sensor (not illustrated) capable of observing the reticule mark on the mask
512
and the alignment mark on the wafer
55
(wafer mark) or the reference mark on the reference mark plate
557
simultaneously.
When exposure is conducted to the wafer
55
by the exposure device shown in
FIG. 5
, only the wafer stage
54
is moved in a step and repeat manner and images of a pattern on the mask
512
are exposed to each of shot regions of the wafer
55
respectively. In the exposure device described above, when a pattern image of the mask
512
is exposed further on the circuit pattern on the wafer
55
formed in the preceding step, it is necessary to correspond the wafer coordinate system defining the coordinate for each of the shot regions on the wafer
55
with the mask coordinate system defining the coordinate system for the pattern on the mask
512
, that is, to take alignment.
The alignment is conducted, for example, by the following procedures. At first, after driving the wafer stage
54
to move the reticule mark plate
557
into an exposure field of the projection optical system
58
, the amount of the positional displacement between the reticule mark
560
R and the reference mark
561
F is detected by one reticule alignment microscope
558
and determine the pattern position for the reticule
512
on the wafer coordinate system based on the amount of the positional displacement. Further, the wafer stage
54
is driven to move the reference mark
560
F to the position for the reference mark
561
F to detect the amount of positional displacement between the reticule mark
561
R and the reference mark
560
F by the reticule alignment microscope
559
, to measure the angle of rotation of the reticule
512
in the wafer coordinate system. Then, the reticule
512
or the wafer stage
514
is rotated to correct the angle of rotation and correspond the wafer coordinate system with the reticule coordinate system.
Further, in
FIG. 5
, an off axis system alignment microscope
534
is disposed on the lateral side of the projection optical system
58
in order to detect the position for the wafer mark formed corresponding to each of the shot regions on the wafer
55
. In this case, based on the position for the wafer mark detected by the alignment microscope
534
, the corresponding shot region on the wafer
55
is set within the exposure region of the projection optical system
58
. Accordingly, it is necessary to previously determine the amount of a base line that is a distance between the reference point in the exposure field (for example, center for exposure) of the projection optical system
58
and the reference point
62
in the observation region of the off axis system alignment microscope
534
.
When the amount of the base lines is measured, the amount of positional displacement of conjugate images between the reticule marks
560
R and
561
R, and the reference marks
560
F and
561
F on the wafer stage
54
are measured and then, the wafer stage
54
is moved, for example, by an amount equal with the designed value for the amount of the base line, the amount of positional displacement between the reference point
562
and the corresponding reference mark on the reference mark plate
557
is measured by the alignment microscope
534
, to determine the amount of the base line based on the amount of the positional displacement thereof.
Since each of the operations for alignment explained above is conducted by using the alignment mark formed on the mask, if the position for the alignment mark on the mask includes an error, it forms an alignment error of the wafer to be exposed as it is (alignment error between the pattern on the wafer formed in the succeeding step and the pattern on the wafer to be formed in the succeeding step), to possibly lower the yield of the semiconductor device.
Particularly, rapid development for the refinement of semiconductor devices in recent years, has brought about a problem that the error of the pattern position on the mask caused by mask drawing gives an undesired effect on the alignment accuracy upon exposure and inventions for the exposing method to reduce the effect have been proposed.
For example, Japanese Published Unexamined Patent Application Hei 7-176468 (Related Art 1) discloses an example of a scanning type projection exposure method of using a mask on which a plurality of alignment marks are formed in a scanning direction, measuring the positions for the marks on an exposure device and reducing the effect of the mask drawing error by the averaging effect for the result of measurement.
Further, Japanese Published Unexamined Patent Application Hei 7-29803 (Related Art 2) discloses an example of an exposure device adapted to determine the mask drawing error based on the measurement of the positions for a plurality of patterns on a mask by an exposure device and conduct scanning exposure while moving the mask or the wafer so as to correct the error upon exposure.
The prior arts 1 and 2 reduce the error by averaging the overall drawing errors of the mask but no consideration is taken on the relative positional error between the reticule alignment mark and the device area. Accordingly, they are not always satisfactory for the correction of the alignment error caused by reticule alignment.
Further, while the prior arts 1 and 2 measure the accuracy for the drawing position of the mask on the exposure device, since the exposure device has to be used for the operation other than exposure, this causes lowering of the throughput in the device production to bring about a problem, particularly, in multiplicity kind small lot production such as in system LSI using plural kinds and a number of reticules.
SUMMARY OF THE INVENTION
This invention provides a technique capable of solving the subject in the prior art described above and obtaining a desired alignment accuracy in a device area, even when th

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