Boots – shoes – and leggings
Patent
1989-03-17
1993-08-03
Dixon, Joseph L.
Boots, shoes, and leggings
395425, 364DIG1, 36523002, 36523003, G06F 1200
Patent
active
052336999
ABSTRACT:
The present invention provides an extended memory capability without requiring a much faster cache memory. This is done by providing address latches on the same chip as the cache memory and providing the most significant address bit from the address latches to be combined with the output of appropriate interface logic. The result of this combination is provided as address control signal along a path to the memory which does not require as long an access time as the rest of the addresses.
REFERENCES:
patent: 4106090 (1978-08-01), Erickson et al.
patent: 4346437 (1982-08-01), Blahut et al.
patent: 4500962 (1985-02-01), Lemaire et al.
patent: 4587613 (1986-05-01), Duncan
Han Kong-Yeu
Koo James T.
Wu In-Nan
Dixon Joseph L.
Vitelic Corporation
Whitfield Michael A.
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