Expandable memory system and method for interleaving addresses a

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364DIG1, 364DIG2, 36518902, 36523002, 36523003, 395454, 395484, 395494, G06F 1200, G06F 1300

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056849737

ABSTRACT:
An expandable memory system and a method for operating a memory system having a variable number of memory banks are described. The memory system can utilize a variable number of separately replaceable memory banks which can be implemented with memory element, such as dynamic random access memory chips, which are of differing speeds and or sizes. The memory system implements an interleaving of memory addresses among the memory banks as a function of the number of banks actually present so that successive memory accesses are not unnecessarily delayed by the recovery times of the memory elements. The memory system includes a programmable address decoder having a writable memory which provides bank address signals. Each of the banks includes a respective delay line for providing an output signal a respective presettable time after address signals are received by that bank for signalling to the host that data is ready to be transferred.

REFERENCES:
patent: 3974479 (1976-08-01), Kotok et al.
patent: 4860252 (1989-08-01), Sykora
patent: 4866603 (1989-09-01), Chiba
patent: 4908789 (1990-03-01), Blokkum et al.
patent: 5175836 (1992-12-01), Morgan
patent: 5226134 (1993-07-01), Aldereguia et al.
patent: 5237672 (1993-08-01), Ing-Simmons et al.
patent: 5237674 (1993-08-01), Mohme et al.
patent: 5269010 (1993-12-01), MacDonald
patent: 5274788 (1993-12-01), Koike
patent: 5293607 (1994-03-01), Brockmann et al.
patent: 5301278 (1994-04-01), Bowater et al.
patent: 5301292 (1994-04-01), Hilton et al.
patent: 5341486 (1994-08-01), Castle
patent: 5357621 (1994-10-01), Cox
patent: 5412788 (1995-05-01), Collins et al.
patent: 5446691 (1995-08-01), North
patent: 5483497 (1996-01-01), Mochizuki et al.
patent: 5497478 (1996-03-01), Murata
patent: 5530837 (1996-06-01), Williams et al.
patent: 5559986 (1996-09-01), Alpert et al.
patent: 5572692 (1996-11-01), Murdoch et al.
IBM Technical Disclosure Bulletin, vol. 32, No. 7, Dec. 1989, New York US pp. 212-213 `Programmable Variable Memory Configuration Control`.
IBM Technical Disclosure Bulletin, vol. 34, No. 10A, Mar. 1992, New York US pp. 91 -94 `Programmable Support For Controlling Memory Subsystem Configurations In Personal Computers`.
Copy of Communication dated Jul. 8, 1994 from European Patent Office re EPA No. 94301565.1.

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