Expandable memory for PCM signal transmission

Details Expandable memory for PCM signal transmission Expandable memory for PCM signal transmission

1976-06-04

1977-11-15

Stewart, David L.

H04J 306

Patent

active

040586820

ABSTRACT:
An incoming bit stream of a first bit frequency, divided into a succession of n-bit words, is converted into an outgoing bit stream of a second bit frequency with the aid of two n-stage buffer registers alternately loaded by two sets of interleaved writing pulses, on every n.sup.th cycle of the first bit frequency, with incoming words which are alternately read out on every n.sup.th cycle of the second bit frequency by two sets of interleaved reading pulses. A logic network detects the coincidence of a reading pulse from one set with either of two guard pulses immediately preceding and succeeding, respectively, each writing pulse of the corresponding set; upon such coincidence, a switching network transposes the two sets of writing pulses to restore an original relative pulse position in which the reading pulses of each set occur substantially midway between writing pulses of the same set.

REFERENCES:
patent: 3725591 (1973-04-01), Palombari
patent: 3920918 (1975-11-01), Thomas
patent: 3928727 (1975-12-01), Roche

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