Expandable high performance FIFO design which includes memory ce

Details Expandable high performance FIFO design which includes memory ce Expandable high performance FIFO design which includes memory ce

1993-10-12

1996-08-27

Swann, Tod R.

Multiplex communications

Wide area network

Packet switching

395851, 395858, 370 62, 364DIG1, G06F 1300, G06F 1304

Patent

active

055510094

ABSTRACT:
An arrangement of cells with input and output steering circuitry as well as internal shifting capabilities is disclosed which advantageously provides a first in/first out (FIFO) register circuit which can be written to and read from in contiguous clock cycles. The FIFO register circuit is provided with an arrangement of self contained FIFO cells, each cell containing its own input multiplexer and control circuitry.

REFERENCES:
patent: 3675209 (1972-07-01), Trost et al.
patent: 4307447 (1981-12-01), Provanzand et al.
patent: 4374428 (1983-02-01), Barnes
patent: 4686698 (1987-08-01), Tompkins et al.
patent: 4811296 (1989-03-01), Garde
patent: 4942515 (1990-07-01), Marzucco et al.
patent: 4958342 (1990-09-01), Williams et al.
patent: 4959772 (1990-09-01), Smith et al.
patent: 4962483 (1990-10-01), Lodhi
patent: 5005158 (1991-04-01), McClure et al.
patent: 5036489 (1991-07-01), Theobald
patent: 5127103 (1992-06-01), Hiu et al.
Hart et al. "A dual-port FIFO memory with umlimited expansion capability", IEE 1985.

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