Electrical computers and digital processing systems: processing – Architecture based instruction processing – Stack based computer
Reexamination Certificate
2005-12-20
2005-12-20
Tsai, Henry W. H. (Department: 2183)
Electrical computers and digital processing systems: processing
Architecture based instruction processing
Stack based computer
C712S220000
Reexamination Certificate
active
06978358
ABSTRACT:
A data processor comprises a register bank containing a plurality of “n” bit registers for storing data items, a set of registers within the register bank being allocatable to hold stack data items from a portion of the stack, and each register in the set storing as an n-bit value stack data items of the first or second type. An arithmetic logic unit executes operations upon data items held in the registers and a decoder decodes a stack-based instruction to specify a number of operations to be executed by the arithmetic logic unit upon one or more stack data items held in predetermined registers in the set. Further, a stack controller is arranged to control movement of stack data items between the stack and the set of registers, and is responsive to the decoder causing one or more stack data items to be held in the predetermined registers.
REFERENCES:
patent: 5634118 (1997-05-01), Blomgren
patent: 5687336 (1997-11-01), Shen et al.
patent: 6332215 (2001-12-01), Patel et al.
ARM Limited
Nixon & Vanderhye P.C.
Tsai Henry W. H.
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