Electrical computers and digital processing systems: processing – Processing architecture – Distributed processing system
Reexamination Certificate
2007-04-19
2009-10-06
Kim, Kenneth S (Department: 2111)
Electrical computers and digital processing systems: processing
Processing architecture
Distributed processing system
C712S030000
Reexamination Certificate
active
07600095
ABSTRACT:
Executing a scatter operation on a parallel computer includes: configuring a send buffer on a logical root, the send buffer having positions, each position corresponding to a ranked node in an operational group of compute nodes and for storing contents scattered to that ranked node; and repeatedly for each position in the send buffer: broadcasting, by the logical root to each of the other compute nodes on a global combining network, the contents of the current position of the send buffer using a bitwise OR operation, determining, by each compute node, whether the current position in the send buffer corresponds with the rank of that compute node, if the current position corresponds with the rank, receiving the contents and storing the contents in a reception buffer of that compute node, and if the current position does not correspond with the rank, discarding the contents.
REFERENCES:
patent: 5832215 (1998-11-01), Kato et al.
patent: 2002/0144027 (2002-10-01), Schmisseur
Archer Charles J.
Ratterman Joseph D.
Biggers & Ohanian LLP
International Business Machines - Corporation
Kim Kenneth S
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