Execute unit configured to selectably interpret an operand as mu

Details Execute unit configured to selectably interpret an operand as mu Execute unit configured to selectably interpret an operand as mu

1996-04-17

2000-07-18

Coulter, Kenneth

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

G06F 738

Patent

active

060920947

ABSTRACT:
An execute unit including an integer operation circuit is provided. The integer operation circuit is dynamically configurable to operate upon many different widths of operands. A single pair of operands may be operated upon, wherein the width of the operands is the maximum width the integer operation circuit is configured to handle. Alternatively, multiple pairs of operands having narrower widths may be operated upon. The instruction being executed defines the width of the operands and therefore the number of operands. Wide operand operations are performed at a rate of one per instruction, and a rate of more than one instruction is achieved for narrow operands. The same integer operation circuitry is employed to perform both narrow and wide integer operations. Silicon area consumed by the integer operation circuitry may be reduced as compared to a wide integer operation circuit and multiple narrow integer operation circuits.

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